Signal integrity
Encyclopedia
Signal integrity or SI is a set of measures of the quality of an electrical signal. In digital electronics, a stream of binary values is represented by a voltage (or current) waveform. However, digital signals are fundamentally analog
in nature, and all signals are subject to effects such as noise, distortion
, and loss. Over short distances and at low bit rates, a simple conductor can transmit this with sufficient fidelity. At high bit rates and over longer distances or through various mediums, various effects can degrade the electrical signal to the point where less-than-ideal conditions (errors) occur, and the system or device fails. Signal integrity engineering is the task of analyzing and mitigating these effects. Signal integrity engineering is an important activity at all levels of electronics packaging and assembly, from internal connections of an integrated circuit
(IC), through the package
, the printed circuit board
(PCB), the backplane
, and inter-system connections. While there are some common themes at these various levels, there are also practical considerations, in particular the interconnect flight time versus the bit period, that cause substantial differences in the approach to signal integrity for on-chip connections versus chip-to-chip connections.
Some of the main issues of concern for signal integrity are ringing
, crosstalk
, ground bounce
, distortion
, signal loss, and power supply
noise.
suffered from severe signal integrity problems, and analysis of the problems yielded many of the mathematical tools still used today to analyze signal integrity problems, such as the telegrapher's equations. Products as old as the Western Electric crossbar telephone exchange (circa 1940), based on the wire-spring relay, suffered almost all the effects seen today - the ringing, crosstalk, ground bounce, and power supply noise that plague modern digital products.
On printed circuit boards, signal integrity became a serious concern when the transition (rise and fall) times of signals started to become comparable to the propagation time across the board. Very roughly speaking, this typically happens when system speeds exceed a few tens of MHz. At first, only a few of the most important, or highest speed, signals needed detailed analysis or design. As speeds increased, a larger and larger fraction of signals needed SI analysis and design practices. In modern (> 100 MHz) circuit designs. essentially all signals must be designed with SI in mind.
For ICs, SI analysis became necessary as an effect of reduced design rules. In the early days of the modern VLSI era, digital chip circuit design and layout were manual processes. The use of abstraction and the application of automatic synthesis techniques
have since allowed designers to express their designs using high-level languages
and apply an automated design process to create very complex designs, ignoring the electrical characteristics of the underlying circuits to a large degree. However, scaling trends (see Moore's law
) brought electrical effects back to the forefront in recent technology nodes. With scaling of technology below 0.25 µm, the wire delays have become comparable or even greater than the gate delays. As a result the wire delays needed to be considered to achieve timing closure
. In nanometer technologies at 0.13 µm and below, unintended interactions between signals (e.g. crosstalk) became an important consideration for digital design. At these technology nodes, the performance and correctness of a design cannot be assured without considering noise effects.
Most of this article is about Si in relation to modern electronic technology - notably the use integrated circuits and printed circuit
board technology. Nevertheless, the principles of SI are not exclusive to the signalling technology used. SI existed long before the advent of either technology, and will do so as long as electronic communications persist.
The cost of these failures is very high, and includes photomask
costs, engineering costs and
opportunity cost
due to delayed product introduction. Therefore electronic design automation
(EDA) tools have been developed to analyze, prevent, and correct these problems.
In integrated circuit
s, or ICs, the main cause of signal integrity problems is crosstalk.
In CMOS
technologies, this is primarily due to coupling capacitance
, but in general it may be caused by mutual inductance, substrate coupling
, non-ideal gate operation, and other sources. The fixes normally involve changing the sizes of drivers and/or spacing of wires.
In analog circuits, designers are also concerned with noise that arise from physical sources, such as thermal noise, flicker noise
, and shot noise
. These noise sources on the one hand present a lower limit to the smallest signal that can be amplified, and on the other, define an upper limit to the useful amplification.
In digital ICs, noise in a signal of interest arises primarily from coupling effects from switching of other signals. Increasing interconnect density has led to each wire having neighbors that are physically closer together, leading to increased coupling capacitance between neighboring nets. As circuits have continued to shrink in accordance with Moore's law
, several effects have conspired to make noise problems worse:
These effects have increased the interactions between signals and decreased the noise immunity of
digital CMOS circuits. This has led to noise being a significant problem for digital ICs that must be considered by every digital chip designer prior to tape-out
. There are several concerns that must be mitigated:
Modern signal integrity tools for IC design perform all these steps automatically, producing reports that give a design a clean bill of health, or a list of problems that must be fixed. However, such tools generally are not applied across an entire IC, but only selected signals of interest.
Each of these fixes may possibly cause other problems. This type of issue must be addressed as part of design flows and design closure
. Re-analysis after design changes is a prudent measure.
or ODT is the technology where the termination resistor for impedance matching in transmission lines is located within a semiconductor chip, instead of a separate, discrete device mounted on a circuit board.
The channel flight time (delay) of the interconnect is roughly per of FR-4
stripline
(speed of light in the dielectric). Reflections of previous pulses at impedance mismatches die down after a few bounces up and down the line i.e. on the order of the flight time. At low bit rates, the echoes die down on their own, and by midpulse, they are not a concern. Impedance matching is neither necessary nor desirable. There are multitudes of circuit board types other than FR-4, but usually they are more costly to manufacture.
The gentle trend to higher bit rates accelerated dramatically in 2004, with the introduction by Intel of the PCI-Express standard. Following this lead, the majority of chip-to-chip connection standards underwent an architectural shift from parallel busses to serializer/deserializer (SERDES
) links called "lanes." Such serial links eliminate parallel bus clock skew and reduce the number of traces and resultant coupling effects. But these advantages come at the cost of a large increase in bit rate on the lanes, and shorter bit periods.
At multigigabit/s data rates, link designers must consider reflections at impedance changes (e.g. where traces change levels at vias
), noise induced by densely-packed neighboring connections (crosstalk
), and high-frequency attenuation caused by the skin effect
in the metal trace and dielectric loss tangent. Examples of mitigation techniques for these impairments are a redesign of the via geometry to ensure an impedance match, use of differential signaling
, and preemphasis
filtering, respectively..
At these new multigigabit/s bit rates, the bit period is shorter than the flight time and echoes of previous pulses can arrive at the receiver on top of the main pulse, and corrupt it. In communication engineering this is called intersymbol interference (ISI). In signal integrity engineering it is usually called eye closure (a reference to the clutter in the center of a type of oscilloscope trace called an eye diagram). When the bit period is shorter than the flight time, elimination of reflections using classic microwave techniques like matching the electrical impedance
of the transmitter to the interconnect, the sections of interconnect to each other, and the interconnect to the receiver, is crucial. Termination with a source or load
is a synonym for matching at the two ends. The interconnect impedance that can be selected is constrained by the impedance of free space , a geometric form factor and by the square root of the relative dielectric constant of the stripline filler (typically FR-4, with a relative dielectric constant of ~4). Together, these properties determine the trace's characteristic impedance
. is a convenient choice for single-end lines, and for differential.
As a consequence of the low impedance required by matching, PCB signal traces carry much more current than their on-chip counterparts. This larger current induces crosstalk primarily in a magnetic, or inductive, mode, as opposed to a capacitive mode. To combat this crosstalk, digital PCB designers must remain acutely aware of not only the intended signal path for every signal, but also the path of returning signal current for every signal. The signal itself and its returning signal current path are equally capable of generating inductive crosstalk. Differential trace pairs help to reduce these effects.
A third difference between on-chip and chip-to-chip connection involves the cross-sectional size of the signal conductor, namely that PCB conductors are much larger (typically or more in width). Thus, PCB traces have a small series resistance
(typically 0.1 ohms/cm) at DC. The high frequency component of the pulse is however attenuated by additional resistance due to the skin effect and dielectric loss tangent associated with the PCB material.
The main challenge often depends on whether the project is a cost-driven consumer application or a performance-driven infrastructure application. They tend to require extensive post-layout verification (using an EM simulator
) and pre-layout design optimization (using SPICE
and a channel simulator), respectively.
There are special purpose EDA
tools
that help the engineer perform all these steps on each signal in a design, pointing out problems or verifying the design is ready for manufacture. In selecting which tool is best for a particular task, one must consider characteristics of each such as capacity (how many nodes or elements), performance (simulation speed), accuracy (how good are the models), convergence (how good is the solver), capability (non-linear versus linear, frequency dependent versus frequency independent etc.), and ease of use.
Each of these fixes may possibly cause other problems. This type of issue must be addressed as part of design flows and design closure
.
Analog signal
An analog or analogue signal is any continuous signal for which the time varying feature of the signal is a representation of some other time varying quantity, i.e., analogous to another time varying signal. It differs from a digital signal in terms of small fluctuations in the signal which are...
in nature, and all signals are subject to effects such as noise, distortion
Distortion
A distortion is the alteration of the original shape of an object, image, sound, waveform or other form of information or representation. Distortion is usually unwanted, and often many methods are employed to minimize it in practice...
, and loss. Over short distances and at low bit rates, a simple conductor can transmit this with sufficient fidelity. At high bit rates and over longer distances or through various mediums, various effects can degrade the electrical signal to the point where less-than-ideal conditions (errors) occur, and the system or device fails. Signal integrity engineering is the task of analyzing and mitigating these effects. Signal integrity engineering is an important activity at all levels of electronics packaging and assembly, from internal connections of an integrated circuit
Integrated circuit
An integrated circuit or monolithic integrated circuit is an electronic circuit manufactured by the patterned diffusion of trace elements into the surface of a thin substrate of semiconductor material...
(IC), through the package
Integrated circuit packaging
Integrated circuit packaging is the final stage of semiconductor device fabrication per se, followed by IC testing.Packaging in ceramic or plastic prevents physical damage and corrosion and supports the electrical contacts required to assemble the integrated circuit into a system.In the integrated...
, the printed circuit board
Printed circuit board
A printed circuit board, or PCB, is used to mechanically support and electrically connect electronic components using conductive pathways, tracks or signal traces etched from copper sheets laminated onto a non-conductive substrate. It is also referred to as printed wiring board or etched wiring...
(PCB), the backplane
Backplane
A backplane is a group of connectors connected in parallel with each other, so that each pin of each connector is linked to the same relative pin of all the other connectors forming a computer bus. It is used as a backbone to connect several printed circuit boards together to make up a complete...
, and inter-system connections. While there are some common themes at these various levels, there are also practical considerations, in particular the interconnect flight time versus the bit period, that cause substantial differences in the approach to signal integrity for on-chip connections versus chip-to-chip connections.
Some of the main issues of concern for signal integrity are ringing
Ringing (signal)
In electronics, signal processing, and video, ringing is unwanted oscillation of a signal, particularly in the step response...
, crosstalk
Crosstalk (electronics)
In electronics, crosstalk is any phenomenon by which a signal transmitted on one circuit or channel of a transmission system creates an undesired effect in another circuit or channel...
, ground bounce
Ground bounce
In electronic engineering, ground bounce is a phenomenon associated with transistor switching where the gate voltage can appear to be less than the local ground potential, causing the unstable operation of a logic gate.-Description:...
, distortion
Distortion
A distortion is the alteration of the original shape of an object, image, sound, waveform or other form of information or representation. Distortion is usually unwanted, and often many methods are employed to minimize it in practice...
, signal loss, and power supply
Power supply
A power supply is a device that supplies electrical energy to one or more electric loads. The term is most commonly applied to devices that convert one form of electrical energy to another, though it may also refer to devices that convert another form of energy to electrical energy...
noise.
History
Signal integrity primarily involves the electrical performance of the wires and other packaging structures used to move signals about within an electronic product. Such performance is a matter of basic physics and as such has remained relatively unchanged since the inception of electronic signaling. The first Transatlantic telegraph cableTransatlantic telegraph cable
The transatlantic telegraph cable was the first cable used for telegraph communications laid across the floor of the Atlantic Ocean. It crossed from , Foilhommerum Bay, Valentia Island, in western Ireland to Heart's Content in eastern Newfoundland. The transatlantic cable connected North America...
suffered from severe signal integrity problems, and analysis of the problems yielded many of the mathematical tools still used today to analyze signal integrity problems, such as the telegrapher's equations. Products as old as the Western Electric crossbar telephone exchange (circa 1940), based on the wire-spring relay, suffered almost all the effects seen today - the ringing, crosstalk, ground bounce, and power supply noise that plague modern digital products.
On printed circuit boards, signal integrity became a serious concern when the transition (rise and fall) times of signals started to become comparable to the propagation time across the board. Very roughly speaking, this typically happens when system speeds exceed a few tens of MHz. At first, only a few of the most important, or highest speed, signals needed detailed analysis or design. As speeds increased, a larger and larger fraction of signals needed SI analysis and design practices. In modern (> 100 MHz) circuit designs. essentially all signals must be designed with SI in mind.
For ICs, SI analysis became necessary as an effect of reduced design rules. In the early days of the modern VLSI era, digital chip circuit design and layout were manual processes. The use of abstraction and the application of automatic synthesis techniques
Logic synthesis
In electronics, logic synthesis is a process by which an abstract form of desired circuit behavior, typically register transfer level , is turned into a design implementation in terms of logic gates. Common examples of this process include synthesis of HDLs, including VHDL and Verilog...
have since allowed designers to express their designs using high-level languages
Register transfer level
In integrated circuit design, register-transfer level is a level of abstraction used in describing the operation of a synchronous digital circuit...
and apply an automated design process to create very complex designs, ignoring the electrical characteristics of the underlying circuits to a large degree. However, scaling trends (see Moore's law
Moore's Law
Moore's law describes a long-term trend in the history of computing hardware: the number of transistors that can be placed inexpensively on an integrated circuit doubles approximately every two years....
) brought electrical effects back to the forefront in recent technology nodes. With scaling of technology below 0.25 µm, the wire delays have become comparable or even greater than the gate delays. As a result the wire delays needed to be considered to achieve timing closure
Timing Closure
Timing closure is the process by which an FPGA or a VLSI design is modified to meet its timing requirements. Most of the modifications are handled by EDA tools based on directives given by a designer...
. In nanometer technologies at 0.13 µm and below, unintended interactions between signals (e.g. crosstalk) became an important consideration for digital design. At these technology nodes, the performance and correctness of a design cannot be assured without considering noise effects.
Most of this article is about Si in relation to modern electronic technology - notably the use integrated circuits and printed circuit
Printed circuit
Printed circuit may refer to:* Printed circuit board* Printed Circuit Corporation, an electronics manufacturer...
board technology. Nevertheless, the principles of SI are not exclusive to the signalling technology used. SI existed long before the advent of either technology, and will do so as long as electronic communications persist.
On-chip signal integrity
Signal integrity problems in modern integrated circuits (ICs) can have many drastic consequences for digital designs:- Products can fail to operate at all, or worse yet, become unreliable in the field.
- The design may work, but only at speeds slower than planned
- Yield may be lowered, sometimes drastically
The cost of these failures is very high, and includes photomask
Photomask
A photomask is an opaque plate with holes or transparencies that allow light to shine through in a defined pattern. They are commonly used in photolithography.-Overview:...
costs, engineering costs and
opportunity cost
Opportunity cost
Opportunity cost is the cost of any activity measured in terms of the value of the best alternative that is not chosen . It is the sacrifice related to the second best choice available to someone, or group, who has picked among several mutually exclusive choices. The opportunity cost is also the...
due to delayed product introduction. Therefore electronic design automation
Electronic design automation
Electronic design automation is a category of software tools for designing electronic systems such as printed circuit boards and integrated circuits...
(EDA) tools have been developed to analyze, prevent, and correct these problems.
In integrated circuit
Integrated circuit
An integrated circuit or monolithic integrated circuit is an electronic circuit manufactured by the patterned diffusion of trace elements into the surface of a thin substrate of semiconductor material...
s, or ICs, the main cause of signal integrity problems is crosstalk.
In CMOS
CMOS
Complementary metal–oxide–semiconductor is a technology for constructing integrated circuits. CMOS technology is used in microprocessors, microcontrollers, static RAM, and other digital logic circuits...
technologies, this is primarily due to coupling capacitance
Capacitance
In electromagnetism and electronics, capacitance is the ability of a capacitor to store energy in an electric field. Capacitance is also a measure of the amount of electric potential energy stored for a given electric potential. A common form of energy storage device is a parallel-plate capacitor...
, but in general it may be caused by mutual inductance, substrate coupling
Substrate coupling
In an integrated circuit, a signal can couple from one node to another via the substrate. This phenomenon is referred to as substrate coupling or substrate noise coupling....
, non-ideal gate operation, and other sources. The fixes normally involve changing the sizes of drivers and/or spacing of wires.
In analog circuits, designers are also concerned with noise that arise from physical sources, such as thermal noise, flicker noise
Flicker noise
Flicker noise is a type of electronic noise with a 1/ƒ, or pink power density spectrum. It is therefore often referred to as 1/ƒ noise or pink noise, though these terms have wider definitions...
, and shot noise
Shot noise
Shot noise is a type of electronic noise that may be dominant when the finite number of particles that carry energy is sufficiently small so that uncertainties due to the Poisson distribution, which describes the occurrence of independent random events, are of significance...
. These noise sources on the one hand present a lower limit to the smallest signal that can be amplified, and on the other, define an upper limit to the useful amplification.
In digital ICs, noise in a signal of interest arises primarily from coupling effects from switching of other signals. Increasing interconnect density has led to each wire having neighbors that are physically closer together, leading to increased coupling capacitance between neighboring nets. As circuits have continued to shrink in accordance with Moore's law
Moore's Law
Moore's law describes a long-term trend in the history of computing hardware: the number of transistors that can be placed inexpensively on an integrated circuit doubles approximately every two years....
, several effects have conspired to make noise problems worse:
- To keep resistance tolerable despite decreased width, modern wire geometries are thicker in proportion to their spacing. This increases the sidewall capacitance at the expense of capacitance to ground, hence increasing the induced noise voltage (expressed as a fraction of supply voltage).
- Technology scaling has led to lower threshold voltageThreshold voltageThe threshold voltage of a MOSFET is usually defined as the gate voltage where an inversion layer forms at the interface between the insulating layer and the substrate of the transistor. The purpose of the inversion layer's forming is to allow the flow of electrons through the gate-source junction...
s for MOS transistors, and has also reduced the difference between threshold and supply voltages, thereby reducing noise marginNoise marginIn electrical engineering, noise margin is the amount by which a signal exceeds the minimum amount for proper operation. It is commonly used in at least two contexts:...
s. - Logic speeds, and clock speeds in particular, have increased significantly, thus leading to faster transition (rise and fall) times. These faster transition times are closely linked to higher capacitive crosstalk. Also, at such high speeds the inductive properties of the wires come into play, especially mutual inductance.
These effects have increased the interactions between signals and decreased the noise immunity of
digital CMOS circuits. This has led to noise being a significant problem for digital ICs that must be considered by every digital chip designer prior to tape-out
Tape-out
In electronics design, tape-out or tapeout is the final result of the design cycle for integrated circuits or printed circuit boards, the point at which the artwork for the photomask of a circuit is sent for manufacture....
. There are several concerns that must be mitigated:
- Noise may cause a signal to assume the wrong value. This is particularly critical when the signal is about to be latched (or sampled), for a wrong value could be loaded into a storage element, causing logic failure.
- Noise may delay the settling of the signal to the correct value. This is often called noise-on-delay.
- Noise (e.g. ringing) may cause the input voltage of a gate to drop below ground level, or to exceed the supply voltage. This can reduce the lifetime of the device by stressing components, induce latchupLatchupLatchup is a term used in the realm of integrated circuits to describe a particular type of short circuit which can occur in an improperly designed circuit...
, or cause multiple cycling of signals that should only cycle once in a given period.
Finding IC signal integrity problems
Typically, an IC designer would take the following steps for SI verification:- Perform a layout extractionLayout extractionThe electric circuit extraction or simply circuit extraction, also netlist extraction, is the translation of an integrated circuit layout back into the electrical circuit it is intendedto represent...
to get the parasiticsParasitic element (electrical networks)In electrical networks, a parasitic element is a circuit element that is possessed by an electrical component but which it is not desirable for it to have for its intended purpose. For instance, a resistor is designed to possess resistance, but will also possess unwanted parasitic...
associated with the layout. Usually worst-case parasitics and best-case parasitics are extracted and used in the simulations. For ICs, unlike PCBs, physical measurement of the parasitics is almost never done, since in-situ measurements with external equipment are extremely difficult. Furthermore, any measurement would occur after the chip has been created, which is too late to fix any problems observed. - Create a list of expected noise events, including different types of noise, such as coupling and charge sharingCharge sharingCharge sharing is an undesirable signal integrity phenomenon observed most commonly in the Domino logic family of digital circuits. The charge sharing problem occurs when the charge which is stored at the output node in the phase is shared among the output or junction capacitances of transistors...
. - Create a model for each noise event. It is critical that the model be as accurate as possible.
- For each signal event, decide how to excite the circuit so that the noise event will occur.
- Create a SPICESPICESPICE is a general-purpose, open source analog electronic circuit simulator.It is a powerful program that is used in integrated circuit and board-level design to check the integrity of circuit designs and to predict circuit behavior.- Introduction :Unlike board-level designs composed of discrete...
(or another circuit simulator) netlistNetlistThe word netlist can be used in several different contexts, but perhaps the most popular is in the field of electronic design. In this context, a "netlist" describes the connectivity of an electronic design....
that represents the desired excitation, to include as many effects (such as parasitic inductanceInductanceIn electromagnetism and electronics, inductance is the ability of an inductor to store energy in a magnetic field. Inductors generate an opposing voltage proportional to the rate of change in current in a circuit...
and capacitanceCapacitanceIn electromagnetism and electronics, capacitance is the ability of a capacitor to store energy in an electric field. Capacitance is also a measure of the amount of electric potential energy stored for a given electric potential. A common form of energy storage device is a parallel-plate capacitor...
, and various distortion effects) as possible. - Run SPICE simulations. Analyze the simulation results and decide whether any re-design is required. It is common to analyze the results with an eye patternEye patternIn telecommunication, an eye pattern, also known as an eye diagram, is an oscilloscope display in which a digital data signal from a receiver is repetitively sampled and applied to the vertical input, while the data rate is used to trigger the horizontal sweep...
and by calculating a timing budget.
Modern signal integrity tools for IC design perform all these steps automatically, producing reports that give a design a clean bill of health, or a list of problems that must be fixed. However, such tools generally are not applied across an entire IC, but only selected signals of interest.
Fixing IC signal integrity problems
Once a problem is found, it must be fixed. Typical fixes for IC on-chip problems include:- Removing impedance discontinuities. Finding places where significant shifts in the impedance exist and adjusting the geometry of the path to shift the impedance to better match the rest of the path.
- Driver optimization. You can have too much drive, and also not enough.
- Buffer insertion. In this approach, instead of upsizing the victim driver, a buffer is inserted at an appropriate point in the victim net.
- Aggressor downsizing. This works by increasing the transition time of the attacking net by reducing the strength of its driver.
- Add Shielding. Add shielding of critical nets or clock nets using GND and VDD shields to reduce the effect of Crosstalk. (This technique may lead to routing overhead.)
- RoutingRouting (EDA)In electronic design, wire routing, commonly called simply routing, is a step in the design of printed circuit boards and integrated circuits . It builds on a preceding step, called placement, which determines the location of each active element of an IC or component on a PCB...
changes. Routing changes can be very effective in fixing noise problems, mainly by reducing the most troublesome coupling effects via separation.
Each of these fixes may possibly cause other problems. This type of issue must be addressed as part of design flows and design closure
Design closure
Design closure is the process by which a VLSI design is modified from its initial description to meet a growing list of design constraints and objectives....
. Re-analysis after design changes is a prudent measure.
On-die Termination
On-die terminationOn-die termination
On-die termination is the technology where the termination resistor for impedance matching in transmission lines is located inside a semiconductor chip instead of on a printed circuit board.- Overview of electronic signal termination :...
or ODT is the technology where the termination resistor for impedance matching in transmission lines is located within a semiconductor chip, instead of a separate, discrete device mounted on a circuit board.
Chip-to-chip signal integrity
For wired connections, it is important to compare the interconnect flight time to the bit period to decide whether an impedance matched or unmatched connection is needed.The channel flight time (delay) of the interconnect is roughly per of FR-4
FR-4
FR-4 is a grade designation assigned to glass-reinforced epoxy laminate sheets, tubes, rods and printed circuit boards . FR-4 is a composite material composed of woven fiberglass cloth with an epoxy resin binder that is flame resistant .FR-4 glass epoxy is a popular and versatile high-pressure...
stripline
Stripline
Stripline is a transverse electromagnetic transmission line medium, that was invented by Robert M. Barrett of the Air Force Cambridge Research Centre in the 1950s.- Description :...
(speed of light in the dielectric). Reflections of previous pulses at impedance mismatches die down after a few bounces up and down the line i.e. on the order of the flight time. At low bit rates, the echoes die down on their own, and by midpulse, they are not a concern. Impedance matching is neither necessary nor desirable. There are multitudes of circuit board types other than FR-4, but usually they are more costly to manufacture.
The gentle trend to higher bit rates accelerated dramatically in 2004, with the introduction by Intel of the PCI-Express standard. Following this lead, the majority of chip-to-chip connection standards underwent an architectural shift from parallel busses to serializer/deserializer (SERDES
SerDes
A Serializer/Deserializer is a pair of functional blocks commonly used in high speed communications to compensate for limited input/output. These blocks convert data between serial data and parallel interfaces in each direction...
) links called "lanes." Such serial links eliminate parallel bus clock skew and reduce the number of traces and resultant coupling effects. But these advantages come at the cost of a large increase in bit rate on the lanes, and shorter bit periods.
At multigigabit/s data rates, link designers must consider reflections at impedance changes (e.g. where traces change levels at vias
Via (electronics)
A via is a vertical electrical connection between different layers of conductors in a physical electronic circuit.- In IC :In integrated circuit design, a via is a small opening in an insulating oxide layer that allows a conductive connection between different layers. A via on an integrated circuit...
), noise induced by densely-packed neighboring connections (crosstalk
Crosstalk (electronics)
In electronics, crosstalk is any phenomenon by which a signal transmitted on one circuit or channel of a transmission system creates an undesired effect in another circuit or channel...
), and high-frequency attenuation caused by the skin effect
Skin effect
Skin effect is the tendency of an alternating electric current to distribute itself within a conductor with the current density being largest near the surface of the conductor, decreasing at greater depths. In other words, the electric current flows mainly at the "skin" of the conductor, at an...
in the metal trace and dielectric loss tangent. Examples of mitigation techniques for these impairments are a redesign of the via geometry to ensure an impedance match, use of differential signaling
Differential signaling
Differential signaling is a method of transmitting information electrically by means of two complementary signals sent on two separate wires. The technique can be used for both analog signaling, as in some audio systems, and digital signaling, as in RS-422, RS-485, Ethernet , PCI Express and USB...
, and preemphasis
Preemphasis
In processing electronic audio signals, pre-emphasis refers to a system process designed to increase the magnitude of some frequencies with respect to the magnitude of other frequencies in order to improve the overall signal-to-noise ratio by minimizing the adverse effects of such phenomena as...
filtering, respectively..
At these new multigigabit/s bit rates, the bit period is shorter than the flight time and echoes of previous pulses can arrive at the receiver on top of the main pulse, and corrupt it. In communication engineering this is called intersymbol interference (ISI). In signal integrity engineering it is usually called eye closure (a reference to the clutter in the center of a type of oscilloscope trace called an eye diagram). When the bit period is shorter than the flight time, elimination of reflections using classic microwave techniques like matching the electrical impedance
Electrical impedance
Electrical impedance, or simply impedance, is the measure of the opposition that an electrical circuit presents to the passage of a current when a voltage is applied. In quantitative terms, it is the complex ratio of the voltage to the current in an alternating current circuit...
of the transmitter to the interconnect, the sections of interconnect to each other, and the interconnect to the receiver, is crucial. Termination with a source or load
Electrical termination
Electrical termination of a signal involves providing a terminator at the end of a wire or cable to prevent an RF signal from being reflected back from the end, causing interference...
is a synonym for matching at the two ends. The interconnect impedance that can be selected is constrained by the impedance of free space , a geometric form factor and by the square root of the relative dielectric constant of the stripline filler (typically FR-4, with a relative dielectric constant of ~4). Together, these properties determine the trace's characteristic impedance
Characteristic impedance
The characteristic impedance or surge impedance of a uniform transmission line, usually written Z_0, is the ratio of the amplitudes of a single pair of voltage and current waves propagating along the line in the absence of reflections. The SI unit of characteristic impedance is the ohm...
. is a convenient choice for single-end lines, and for differential.
As a consequence of the low impedance required by matching, PCB signal traces carry much more current than their on-chip counterparts. This larger current induces crosstalk primarily in a magnetic, or inductive, mode, as opposed to a capacitive mode. To combat this crosstalk, digital PCB designers must remain acutely aware of not only the intended signal path for every signal, but also the path of returning signal current for every signal. The signal itself and its returning signal current path are equally capable of generating inductive crosstalk. Differential trace pairs help to reduce these effects.
A third difference between on-chip and chip-to-chip connection involves the cross-sectional size of the signal conductor, namely that PCB conductors are much larger (typically or more in width). Thus, PCB traces have a small series resistance
Electrical resistance
The electrical resistance of an electrical element is the opposition to the passage of an electric current through that element; the inverse quantity is electrical conductance, the ease at which an electric current passes. Electrical resistance shares some conceptual parallels with the mechanical...
(typically 0.1 ohms/cm) at DC. The high frequency component of the pulse is however attenuated by additional resistance due to the skin effect and dielectric loss tangent associated with the PCB material.
The main challenge often depends on whether the project is a cost-driven consumer application or a performance-driven infrastructure application. They tend to require extensive post-layout verification (using an EM simulator
Computational electromagnetics
Computational electromagnetics, computational electrodynamics or electromagnetic modeling is the process of modeling the interaction of electromagnetic fields with physical objects and the environment....
) and pre-layout design optimization (using SPICE
SPICE
SPICE is a general-purpose, open source analog electronic circuit simulator.It is a powerful program that is used in integrated circuit and board-level design to check the integrity of circuit designs and to predict circuit behavior.- Introduction :Unlike board-level designs composed of discrete...
and a channel simulator), respectively.
Finding signal integrity problems
- Perform a layout extractionLayout extractionThe electric circuit extraction or simply circuit extraction, also netlist extraction, is the translation of an integrated circuit layout back into the electrical circuit it is intendedto represent...
to get the parasitics associated with the layout. Usually worst-case parasitics and best-case parasitics are extracted and used in the simulations. Because of the distributed nature of many of the impairments, electromagnetic simulation is used for extraction. - If the PCB or package already exists, the designer can also measure the impairment presented by the connection using high speed instrumentation such as a vector network analyzerNetwork analyzer (electrical)A network analyzer is an instrument that measures the network parameters of electrical networks. Today, network analyzers commonly measure s–parameters because reflection and transmission of electrical networks are easy to measure at high frequencies, but there are other network parameter...
. For example, IEEE P802.3ap Task Force uses measured S-parameters as test cases for proposed solutions to the problem of EthernetEthernetEthernet is a family of computer networking technologies for local area networks commercially introduced in 1980. Standardized in IEEE 802.3, Ethernet has largely replaced competing wired LAN technologies....
over backplanes. - Accurate noise modeling is a must. Create a list of expected noise events, including different types of noise, such as coupling and charge sharingCharge sharingCharge sharing is an undesirable signal integrity phenomenon observed most commonly in the Domino logic family of digital circuits. The charge sharing problem occurs when the charge which is stored at the output node in the phase is shared among the output or junction capacitances of transistors...
. Input Output Buffer Information SpecificationInput Output Buffer Information SpecificationIBIS is a method for integrated circuit vendors to provide information about the input/output buffers of their product to their prospective customers without revealing the intellectual property of their implementation and without requiring proprietary encryption keys...
(IBIS) or circuit models may be used to represent drivers and receivers. - For each noise event, decide how to excite the circuit so that the noise event will occur.
- Create a SPICESPICESPICE is a general-purpose, open source analog electronic circuit simulator.It is a powerful program that is used in integrated circuit and board-level design to check the integrity of circuit designs and to predict circuit behavior.- Introduction :Unlike board-level designs composed of discrete...
(or another circuit simulator) netlistNetlistThe word netlist can be used in several different contexts, but perhaps the most popular is in the field of electronic design. In this context, a "netlist" describes the connectivity of an electronic design....
that represents the desired excitation. - Run SPICE and record the results.
- Analyze the simulation results and decide whether any re-design is required. To analyze the results quite often a data eye is generated and a timing budget is calculated. An example video for generating a data eye can be found on YouTube: An Eye is Born.
There are special purpose EDA
Electronic design automation
Electronic design automation is a category of software tools for designing electronic systems such as printed circuit boards and integrated circuits...
tools
that help the engineer perform all these steps on each signal in a design, pointing out problems or verifying the design is ready for manufacture. In selecting which tool is best for a particular task, one must consider characteristics of each such as capacity (how many nodes or elements), performance (simulation speed), accuracy (how good are the models), convergence (how good is the solver), capability (non-linear versus linear, frequency dependent versus frequency independent etc.), and ease of use.
Fixing signal integrity problems
An IC package or PCB designer removes signal integrity problems through these techniques:- Placing a solid reference planeGround planeIn electrical engineering, a ground plane is an electrically conductive surface.-Radio antenna theory :In telecommunication, a ground plane structure or relationship exists between the antenna and another object, where the only structure of the object is a structure which permits the antenna to...
adjacent to the signal traces to control crosstalk, - Controlling the trace width spacing to the reference plane to create consistent trace impedanceElectrical impedanceElectrical impedance, or simply impedance, is the measure of the opposition that an electrical circuit presents to the passage of a current when a voltage is applied. In quantitative terms, it is the complex ratio of the voltage to the current in an alternating current circuit...
, - Using terminationsElectrical terminationElectrical termination of a signal involves providing a terminator at the end of a wire or cable to prevent an RF signal from being reflected back from the end, causing interference...
to control ringingRinging (signal)In electronics, signal processing, and video, ringing is unwanted oscillation of a signal, particularly in the step response...
, - Route traces perpendicular on adjacent layers to reduce crosstalk,
- Increasing spacing between traces to reduce crosstalk,
- Providing sufficient ground (and power) connections to limit ground bounceGround bounceIn electronic engineering, ground bounce is a phenomenon associated with transistor switching where the gate voltage can appear to be less than the local ground potential, causing the unstable operation of a logic gate.-Description:...
(this subdiscipline of signal integrity is sometimes called out separately as power integrity), - Distributing power with solid plane layers to limit power supply noise.
- Adding a preemphasis filterFilter (signal processing)In signal processing, a filter is a device or process that removes from a signal some unwanted component or feature. Filtering is a class of signal processing, the defining feature of filters being the complete or partial suppression of some aspect of the signal...
to the transmitter driving cell. See, for example,. - Adding an equalizerEqualizationEqualization, is the process of adjusting the balance between frequency components within an electronic signal. The most well known use of equalization is in sound recording and reproduction but there are many other applications in electronics and telecommunications. The circuit or equipment used...
to the receiving cell - Improved clock and data recoveryClock recoverySome digital data streams, especially high-speed serial data streams are sent without an accompanying clock signal. The receiver generates a clock from an approximate frequency reference, and then phase-aligns to the transitions in the data stream with a phase-locked loop...
(CDR) circuitry with low jitter/phase noise
Each of these fixes may possibly cause other problems. This type of issue must be addressed as part of design flows and design closure
Design closure
Design closure is the process by which a VLSI design is modified from its initial description to meet a growing list of design constraints and objectives....
.