SIMM
Encyclopedia
A SIMM, or single in-line memory module, is a type of memory module containing random access memory used in computer
s from the early 1980s to the late 1990s. It differs from a dual in-line memory module (DIMM), the most predominant form of memory module today, in that the contacts on a SIMM are redundant
on both sides of the module. SIMMs were standardised under the JEDEC
JESD-21C standard.
Most early PC motherboard
s (8088
-based PCs, XT
s, and early ATs) used socketed DIP
chips. With the introduction of 286-based IBM XT/286, which could use larger amounts of memory, memory modules evolved to save motherboard space and to ease memory expansion. Instead of plugging in eight or nine single DIP
DRAM
chips, only one additional memory module was needed to increase the memory of the computer. A few 286-based computers used (often non-standard) memory modules like SIPP memory
(single in-line pin package). The SIPP's 30 pins often bent or broke during installation, which is why they were quickly replaced by SIMMs which used contact plates rather than pins.
SIMMs were invented and patented by Wang Laboratories
. Wang invented what was to become the basic memory module, now known as a SIMM (single in-line memory module) in 1983. The original memory modules were built upon ceramic and had pins. Later the pins were removed and the modules were built on standard PCB material.
The first variant of SIMMs has 30 pins and provides 9 bit
s of data. They were used in 286, 386
, 486
, Macintosh Plus
, Macintosh II
, Quadra
, Atari STE and Wang VS systems.
The second variant of SIMMs has 72 pins and provides 32 bits of data (36 bits in parity versions). These appeared first on the IBM PS/2, and later on 486, Pentium, Pentium Pro
and even some Pentium II
systems. By the mid 90s, 72-pin SIMMs had replaced 30-pin SIMMs.
Non-IBM PC computers such as UNIX workstation
s may use proprietary non-standard SIMMs. The Macintosh IIfx
use proprietary non-standard SIMMs with 64 pins.
DRAM technologies used in SIMMs include EDO and FPM.
Due to the differing data bus widths of the memory modules and some processors, sometimes several modules must be installed in identical pairs or in identical groups of four to fill a memory bank. The general rule of thumb is a 286 or 386SX system (data bus width of 16 bits) would require two 30-pin SIMMs for a memory bank. On 386DX or 486 systems (data bus width of 32 bits), either four 30-pin SIMMs or one 72-pin SIMM are required for one memory bank. On Pentium systems (data bus width of 64 bits), two 72-pin SIMMs are required. However, some Pentium systems have support for a "half bank mode", in which the data bus would be shortened to only 98-bits to allow operation of a single SIMM. Conversely, some 386 and 486 systems use what is known as "memory interleaving", which requires twice as many SIMMs and effectively doubles the bandwidth.
The earliest SIMM sockets were conventional push-type sockets. These were soon replaced by ZIF sockets in which the SIMM was inserted and rotated until it locked into place. To install a SIMM, the module must be placed in the socket at an angle, then rotated (angled) into position. To remove one, the two metal or plastic clips at each end must be pulled to the side, then the SIMM must be tilted back and pulled out. The earlier sockets used plastic retainer clips which were found to break, so steel clips replaced them.
Some SIMMs support presence detect (PD). Connections are made to some of the pins that encode the capacity and speed of the SIMM, so that compatible equipment can detect the properties of the SIMM. PD SIMMs can be used in equipment which does not support PD; the information is ignored. Standard SIMMs can easily be converted to support PD by fitting jumpers, if the SIMMs have solder pads to do so, or by soldering wires on.
30-pin SIMMS have 12 address lines, which can provide a total of 24 address bits. With an 8 bit data width, this leads to an absolute maximum capacity of 16 MiB.
* Pins 26, 28 and 29 are not connected on non-parity SIMMs.
With 12 address lines, which can provide a total of 24 address bits, two ranks of chips, and 32 bit data output, the absolute maximum capacity is 227 = 128 MiB.
* Pins 35, 36, 37 and 38 are not connected on non-parity SIMMs.
†/RAS1 and /RAS3 are only used on two-rank SIMMS: 2, 8, 32, and 128 MiB.
# These lines are only defined on 3.3V modules.
x Presence Detect signals are detailed in JEDEC Standard.
for the Commodore
Amiga
used special 64-pin SIMMs (32 bits wide, 1, 4 or 16 MB, 60 ns).
computers to allow overlapping read/write cycles (1, 4, 8, 16 MB, 80 ns).
Computer
A computer is a programmable machine designed to sequentially and automatically carry out a sequence of arithmetic or logical operations. The particular sequence of operations can be changed readily, allowing the computer to solve more than one kind of problem...
s from the early 1980s to the late 1990s. It differs from a dual in-line memory module (DIMM), the most predominant form of memory module today, in that the contacts on a SIMM are redundant
Redundancy (engineering)
In engineering, redundancy is the duplication of critical components or functions of a system with the intention of increasing reliability of the system, usually in the case of a backup or fail-safe....
on both sides of the module. SIMMs were standardised under the JEDEC
JEDEC
The JEDEC Solid State Technology Association, formerly known as the Joint Electron Devices Engineering Council , is an independent semiconductor engineering trade organization and standardization body...
JESD-21C standard.
Most early PC motherboard
Motherboard
In personal computers, a motherboard is the central printed circuit board in many modern computers and holds many of the crucial components of the system, providing connectors for other peripherals. The motherboard is sometimes alternatively known as the mainboard, system board, or, on Apple...
s (8088
Intel 8088
The Intel 8088 microprocessor was a variant of the Intel 8086 and was introduced on July 1, 1979. It had an 8-bit external data bus instead of the 16-bit bus of the 8086. The 16-bit registers and the one megabyte address range were unchanged, however...
-based PCs, XT
IBM Personal Computer XT
The IBM Personal Computer XT, often shortened to the IBM XT, PC XT, or simply XT, was IBM's successor to the original IBM PC. It was released as IBM Machine Type number 5160 on March 8, 1983, and came standard with a hard drive...
s, and early ATs) used socketed DIP
Dual in-line package
In microelectronics, a dual in-line package is an electronic device package with a rectangular housing and two parallel rows of electrical connecting pins. The package may be through-hole mounted to a printed circuit board or inserted in a socket.A DIP is usually referred to as a DIPn, where n is...
chips. With the introduction of 286-based IBM XT/286, which could use larger amounts of memory, memory modules evolved to save motherboard space and to ease memory expansion. Instead of plugging in eight or nine single DIP
Dual in-line package
In microelectronics, a dual in-line package is an electronic device package with a rectangular housing and two parallel rows of electrical connecting pins. The package may be through-hole mounted to a printed circuit board or inserted in a socket.A DIP is usually referred to as a DIPn, where n is...
DRAM
Dram
Dram or DRAM may refer to:As a unit of measure:* Dram , an imperial unit of mass and volume* Armenian dram, a monetary unit* Dirham, a unit of currency in several Arab nationsOther uses:...
chips, only one additional memory module was needed to increase the memory of the computer. A few 286-based computers used (often non-standard) memory modules like SIPP memory
SIPP memory
A SIPP or single in-line pin package was a type of random access memory.It consisted of a small printed circuit board upon which were mounted a number of memory chips. It had 30 pins along one edge which mated with matching holes in the motherboard of the computer.This type of memory was used in...
(single in-line pin package). The SIPP's 30 pins often bent or broke during installation, which is why they were quickly replaced by SIMMs which used contact plates rather than pins.
SIMMs were invented and patented by Wang Laboratories
Wang Laboratories
Wang Laboratories was a computer company founded in 1951 by Dr. An Wang and Dr. G. Y. Chu. The company was successively headquartered in Cambridge , Tewksbury , and finally in Lowell, Massachusetts . At its peak in the 1980s, Wang Laboratories had annual revenues of $3 billion and employed over...
. Wang invented what was to become the basic memory module, now known as a SIMM (single in-line memory module) in 1983. The original memory modules were built upon ceramic and had pins. Later the pins were removed and the modules were built on standard PCB material.
The first variant of SIMMs has 30 pins and provides 9 bit
Bit
A bit is the basic unit of information in computing and telecommunications; it is the amount of information stored by a digital device or other physical system that exists in one of two possible distinct states...
s of data. They were used in 286, 386
Intel 80386
The Intel 80386, also known as the i386, or just 386, was a 32-bit microprocessor introduced by Intel in 1985. The first versions had 275,000 transistors and were used as the central processing unit of many workstations and high-end personal computers of the time...
, 486
Intel 80486
The Intel 80486 microprocessor was a higher performance follow up on the Intel 80386. Introduced in 1989, it was the first tightly pipelined x86 design as well as the first x86 chip to use more than a million transistors, due to a large on-chip cache and an integrated floating point unit...
, Macintosh Plus
Macintosh Plus
The Macintosh Plus computer was the third model in the Macintosh line, introduced on January 16, 1986, two years after the original Macintosh and a little more than a year after the Macintosh 512K, with a price tag of US$2599...
, Macintosh II
Macintosh II
The Apple Macintosh II was the first personal computer model of the Macintosh II series in the Apple Macintosh line and the first Macintosh to support a color display.- History :...
, Quadra
Macintosh Quadra
The Macintosh Quadra series was Apple Computer's product family of professional high-end Apple Macintosh personal computers built using the Motorola 68040 CPU. The first two models in the Quadra line were introduced in 1991, and the name was used until the Power Mac was introduced in 1994...
, Atari STE and Wang VS systems.
The second variant of SIMMs has 72 pins and provides 32 bits of data (36 bits in parity versions). These appeared first on the IBM PS/2, and later on 486, Pentium, Pentium Pro
Pentium Pro
The Pentium Pro is a sixth-generation x86 microprocessor developed and manufactured by Intel introduced in November 1, 1995 . It introduced the P6 microarchitecture and was originally intended to replace the original Pentium in a full range of applications...
and even some Pentium II
Pentium II
The Pentium II brand refers to Intel's sixth-generation microarchitecture and x86-compatible microprocessors introduced on May 7, 1997. Containing 7.5 million transistors, the Pentium II featured an improved version of the first P6-generation core of the Pentium Pro, which contained 5.5 million...
systems. By the mid 90s, 72-pin SIMMs had replaced 30-pin SIMMs.
Non-IBM PC computers such as UNIX workstation
Workstation
A workstation is a high-end microcomputer designed for technical or scientific applications. Intended primarily to be used by one person at a time, they are commonly connected to a local area network and run multi-user operating systems...
s may use proprietary non-standard SIMMs. The Macintosh IIfx
Macintosh IIfx
The Macintosh IIfx was a model of Apple Macintosh computer, introduced in 1990 and discontinued in 1992. At introduction it cost from US $9,000 to US $12,000, depending on configuration, and was the fastest Mac...
use proprietary non-standard SIMMs with 64 pins.
DRAM technologies used in SIMMs include EDO and FPM.
Due to the differing data bus widths of the memory modules and some processors, sometimes several modules must be installed in identical pairs or in identical groups of four to fill a memory bank. The general rule of thumb is a 286 or 386SX system (data bus width of 16 bits) would require two 30-pin SIMMs for a memory bank. On 386DX or 486 systems (data bus width of 32 bits), either four 30-pin SIMMs or one 72-pin SIMM are required for one memory bank. On Pentium systems (data bus width of 64 bits), two 72-pin SIMMs are required. However, some Pentium systems have support for a "half bank mode", in which the data bus would be shortened to only 98-bits to allow operation of a single SIMM. Conversely, some 386 and 486 systems use what is known as "memory interleaving", which requires twice as many SIMMs and effectively doubles the bandwidth.
The earliest SIMM sockets were conventional push-type sockets. These were soon replaced by ZIF sockets in which the SIMM was inserted and rotated until it locked into place. To install a SIMM, the module must be placed in the socket at an angle, then rotated (angled) into position. To remove one, the two metal or plastic clips at each end must be pulled to the side, then the SIMM must be tilted back and pulled out. The earlier sockets used plastic retainer clips which were found to break, so steel clips replaced them.
Some SIMMs support presence detect (PD). Connections are made to some of the pins that encode the capacity and speed of the SIMM, so that compatible equipment can detect the properties of the SIMM. PD SIMMs can be used in equipment which does not support PD; the information is ignored. Standard SIMMs can easily be converted to support PD by fitting jumpers, if the SIMMs have solder pads to do so, or by soldering wires on.
30-pin SIMMs
Standard sizes: 256 KB, 1 MB, 4 MB, 16MB30-pin SIMMS have 12 address lines, which can provide a total of 24 address bits. With an 8 bit data width, this leads to an absolute maximum capacity of 16 MiB.
Pin # | Name | Signal Description | Pin # | Name | Signal Description |
---|---|---|---|---|---|
1 | VCC | 16 | DQ4 | Data 4 | |
2 | /CAS | Column Address Strobe | 17 | A8 | Address 8 |
3 | DQ0 | Data 0 | 18 | A9 | Address 9 |
4 | A0 | Address 0 | 19 | A10 | Address 10 |
5 | A1 | Address 1 | 20 | DQ5 | Data 5 |
6 | DQ1 | Data 1 | 21 | /WE | Write Enable |
7 | A2 | Address 2 | 22 | VSS | Ground |
8 | A3 | Address 3 | 23 | DQ6 | Data 6 |
9 | VSS | Ground | 24 | A11 | Address 11 |
10 | DQ2 | Data 2 | 25 | DQ7 | Data 7 |
11 | A4 | Address 4 | 26 | QP* | Data parity out |
12 | A5 | Address 5 | 27 | /RAS | Row Address Strobe |
13 | DQ3 | Data 3 | 28 | /CASP* | Parity Column Address Strobe |
14 | A6 | Address 6 | 29 | DP* | Data parity in |
15 | A7 | Address 7 | 30 | VCC |
* Pins 26, 28 and 29 are not connected on non-parity SIMMs.
72-pin SIMMs
Standard sizes: 1 MiB, 2 MiB, 4 MiB, 8 MiB, 16 MiB, 32 MiB, 64 MiB, 128 MiBWith 12 address lines, which can provide a total of 24 address bits, two ranks of chips, and 32 bit data output, the absolute maximum capacity is 227 = 128 MiB.
Pin # | Name | Signal Description | Pin # | Name | Signal Description |
---|---|---|---|---|---|
1 | VSS | Ground | 37 | MDP1* | Data Parity 1 (MD8..15) |
2 | MD0 | Data 0 | 38 | MDP3* | Data Parity 3 (MD24..31) |
3 | MD16 | Data 16 | 39 | VSS | Ground |
4 | MD1 | Data 1 | 40 | /CAS0 | Column Address Strobe 0 |
5 | MD17 | Data 17 | 41 | /CAS2 | Column Address Strobe 2 |
6 | MD2 | Data 2 | 42 | /CAS3 | Column Address Strobe 3 |
7 | MD18 | Data 18 | 43 | /CAS1 | Column Address Strobe 1 |
8 | MD3 | Data 3 | 44 | /RAS0 | Row Address Strobe 0 |
9 | MD19 | Data 19 | 45 | /RAS1† | Row Address Strobe 1 |
10 | VCC | 46 | NC | Not Connected | |
11 | NU [PD5#] | Not Used [Presence Detect 5 (3v3)] | 47 | /WE | Read/Write Enable |
12 | MA0 | Address 0 | 48 | NC [/ECC#] | Not Connected [ECC presence (if grounded) (3v3)] |
13 | MA1 | Address 1 | 49 | MD8 | Data 8 |
14 | MA2 | Address 2 | 50 | MD24 | Data 24 |
15 | MA3 | Address 3 | 51 | MD9 | Data 9 |
16 | MA4 | Address 4 | 52 | MD25 | Data 25 |
17 | MA5 | Address 5 | 53 | MD10 | Data 10 |
18 | MA6 | Address 6 | 54 | MD26 | Data 26 |
19 | MA10 | Address 10 | 55 | MD11 | Data 11 |
20 | MD4 | Data 4 | 56 | MD27 | Data 27 |
21 | MD20 | Data 20 | 57 | MD12 | Data 12 |
22 | MD5 | Data 5 | 58 | MD28 | Data 28 |
23 | MD21 | Data 21 | 59 | VCC | |
24 | MD6 | Data 6 | 60 | D29 | Data 29 |
25 | MD22 | Data 22 | 61 | MD13 | Data 13 |
26 | MD7 | Data 7 | 62 | MD30 | Data 30 |
27 | MD23 | Data 23 | 63 | MD14 | Data 14 |
28 | MA7 | Address 7 | 64 | MD31 | Data 31 |
29 | MA11 | Address 11 | 65 | MD15 | Data 15 |
30 | VCC | 66 | NC [/EDO#] | Not Connected [EDO presence (if grounded) (3v3)] | |
31 | MA8 | Address 8 | 67 | PD1x | Presence Detect 1 |
32 | MA9 | Address 9 | 68 | PD2x | Presence Detect 2 |
33 | /RAS3† | Row Address Strobe 3 | 69 | PD3x | Presence Detect 3 |
34 | /RAS2 | Row Address Strobe 2 | 70 | PD4x | Presence Detect 4 |
35 | MDP2* | Data Parity 2 (MD16..23) | 71 | NC [PD(ref)#] | Not Connected [Presence Detect (ref) (3v3)] |
36 | MDP0* | Data Parity 0 (MD0..7) | 72 | VSS | Ground |
* Pins 35, 36, 37 and 38 are not connected on non-parity SIMMs.
†/RAS1 and /RAS3 are only used on two-rank SIMMS: 2, 8, 32, and 128 MiB.
# These lines are only defined on 3.3V modules.
x Presence Detect signals are detailed in JEDEC Standard.
GVP 64-pin
Several CPU cards from Great Valley ProductsGreat Valley Products
Great Valley Products is a former third-party Amiga hardware supplier.The company was mostly known for CPU-Accelerators and SCSI-Hostadapters for the Commodore Amiga 500 and the Amiga 2000 computer series. The company liquidated itself in July 1995...
for the Commodore
Commodore International
Commodore is the commonly used name for Commodore Business Machines , the U.S.-based home computer manufacturer and electronics manufacturer headquartered in West Chester, Pennsylvania, which also housed Commodore's corporate parent company, Commodore International Limited...
Amiga
Amiga
The Amiga is a family of personal computers that was sold by Commodore in the 1980s and 1990s. The first model was launched in 1985 as a high-end home computer and became popular for its graphical, audio and multi-tasking abilities...
used special 64-pin SIMMs (32 bits wide, 1, 4 or 16 MB, 60 ns).
Apple 64-pin
Dual-ported 64-pin SIMMs were used in Apple Macintosh IIfxMacintosh IIfx
The Macintosh IIfx was a model of Apple Macintosh computer, introduced in 1990 and discontinued in 1992. At introduction it cost from US $9,000 to US $12,000, depending on configuration, and was the fastest Mac...
computers to allow overlapping read/write cycles (1, 4, 8, 16 MB, 80 ns).
Pin # | Name | Signal Description | Pin # | Name | Signal Description |
---|---|---|---|---|---|
1 | GND | Ground | 33 | Q4 | Data output bus, bit 4 |
2 | NC | Not connected | 34 | /W4 | Write-enable input for RAM IC 4 |
3 | 35 | A8 | Address bus, bit 8 | ||
4 | 36 | NC | Not connected | ||
5 | /CAS | Column address strobe | 37 | A9 | Address bus, bit 9 |
6 | D0 | Data input bus, bit 0 | 38 | A10 | Address bus, bit 10 |
7 | Q0 | Data output bus, bit 0 | 39 | A11 | Address bus, bit 11 |
8 | /W0 | Write-enable input for RAM IC 0 | 40 | D5 | Data input bus, bit 5 |
9 | A0 | Address bus, bit 0 | 41 | Q5 | Data output bus, bit 5 |
10 | NC | Not connected | 42 | /W5 | Write-enable input for RAM IC 5 |
11 | A1 | Address bus, bit 1 | 43 | NC | Not connected |
12 | D1 | Data input bus, bit 1 | 44 | NC | Not connected |
13 | Q1 | Data output bus, bit 1 | 45 | GND | Ground |
14 | /W1 | Write-enable input for RAM IC 1 | 46 | D6 | Data input bus, bit 6 |
15 | A2 | Address bus, bit 2 | 47 | Q6 | Data output bus, bit 6 |
16 | NC | Not connected | 48 | /W6 | Write-enable input for RAM IC 6 |
17 | A3 | Address bus, bit 3 | 49 | NC | Not connected |
18 | GND | Ground | 50 | D7 | Data input bus, bit 7 |
19 | GND | Ground | 51 | Q7 | Data output bus, bit 7 |
20 | D2 | Data input bus, bit 2 | 52 | /W7 | Write-enable input for RAM IC 7 |
21 | Q2 | Data output bus, bit 2 | 53 | /QB | Reserved (parity) |
22 | /W2 | Write-enable input for RAM IC 2 | 54 | NC | Not connected |
23 | A4 | Address bus, bit 4 | 55 | /RAS | Row address strobe |
24 | NC | Not connected | 56 | NC | Not connected |
25 | A5 | Address bus, bit 5 | 57 | NC | Not connected |
26 | D3 | Data input bus, bit 3 | 58 | Q | Parity-check output |
27 | Q3 | Data output bus, bit 3 | 59 | /WWP | Write wrong parity |
28 | /W3 | Write-enable input for RAM IC 3 | 60 | PDCI | Parity daisy-chain input |
29 | A6 | Address bus, bit 6 | 61 | ||
30 | NC | Not connected | 62 | ||
31 | A7 | Address bus, bit 7 | 63 | PDCO | Parity daisy-chain output |
32 | D4 | Data input bus, bit 4 | 64 | GND | Ground |
See also
- Dual in-line packageDual in-line packageIn microelectronics, a dual in-line package is an electronic device package with a rectangular housing and two parallel rows of electrical connecting pins. The package may be through-hole mounted to a printed circuit board or inserted in a socket.A DIP is usually referred to as a DIPn, where n is...
(DIP) - Single in-line packageSingle in-line packageA single in-line package is an electronic device package which has one row of connecting pins. It is not as popular as the dual in-line package which contain two rows of pins, but has been used for packaging RAM chips and multiple resistors with a common pin. SIPs group RAM chips together on a...
(SIP) - Zig-zag in-line packageZig-zag in-line packageThe zig-zag in-line package or ZIP was a short-lived packaging technology for integrated circuits, particularly dynamic RAM chips. It was intended as a replacement for dual in-line packaging . A ZIP is an integrated circuit encapsulated in a slab of plastic, measuring about 3 mm x 30 mm...
(ZIP) - Dual in-line memory module (DIMM)