Intel i960
Encyclopedia
Intel's i960 was a RISC-based microprocessor
design that became popular during the early 1990s as an embedded
microcontroller
, becoming a best-selling CPU in that field, along with the competing AMD 29000. In spite of its success, Intel dropped i960 marketing in the late 1990s as a side effect of a settlement with DEC
in which Intel received the rights to produce the StrongARM
CPU. The processor continues to be used in a few military applications.
design of the early 1980s. The iAPX 432 was intended to directly support high-level languages that supported tagged, protected, garbage-collected memory — such as Ada and Lisp
— in hardware. Because of its instruction-set complexity, its multi-chip implementation, and design flaws, the iAPX 432 was very slow in comparison to other processors of its time.
In 1984 Intel and Siemens
started a joint project, ultimately called BiiN
, to create a high-end fault-tolerant object-oriented computer system programmed entirely in Ada. Many of the original i432 team members joined this project, though a new lead architect was brought in from IBM, Glenford Myers
. The intended market for the BiiN systems were high-reliability computer users such as banks, industrial systems and nuclear power plants.
Intel's major contribution to the BiiN system was a new processor design, influenced by the protected-memory concepts from the i432. The new design included a number of features to improve performance and avoid problems that had led to the downfall of the i432, which resulted in the i960 design. The first 960 processors entered the final stages of design, known as taping-out, in October 1985 and were sent to manufacturing that month, with the first working chips arriving in late 1985 and early 1986.
The BiiN effort eventually failed, due to market forces, and the 960MX was left without a use. Myers attempted to save the design by outlining several subsets of the full capability architecture created for the BiiN system. He tried to convince Intel management to market the i960 (then still known as the "P7") as a general-purpose processor, both in place of the Intel 80286
and i386 (which taped-out the same month as the first i960), as well as the emerging RISC market for Unix
systems, including a pitch to Steve Jobs
's for use in the NeXT
system. Competition within and outside of Intel came not only from the i386 camp, but also from the i860
processor, yet another RISC processor design emerging within Intel at the time. Myers was unsuccessful at convincing Intel management to support the i960 as a general-purpose or Unix processor, but the chip found a ready market in early high-performance 32-bit embedded systems.
design, notably in its use of register window
s, an implementation-specific number of caches for the per-subroutine registers, allowing for fast routine calls. The competing Stanford University
design, commercialized as MIPS
, did not use this system, relying on the compiler to generate optimal subroutine call and return code instead. Unlike the i386, but in common with most 32-bit designs, the i960 has a flat 32-bit memory space, with no memory segmentation. The i960 architecture also anticipated a superscalar
implementation, with instructions being simultaneously dispatched to more than one unit within the processor.
became the i960KA, and the RISC core with the FPU became the i960KB. The versions were, however, all identical internally — only the labeling was different. This meant the CPUs were much larger than necessary for the "actually supported" feature sets, and as a result, more expensive to manufacture than they needed to be.
The i960KA became successful as a low-cost 32-bit processor for the laser-printer market, as well as for early graphics terminals and other embedded applications. Its success paid for future generations, which removed the complex memory sub-system.
RISC implementation. The C-series only included one ALU, but could dispatch and execute an arithmetic instruction, a memory reference, and a branch instruction at the same time, and sustain two instructions per cycle under certain circumstances. The first versions released ran at 33 MHz, and Intel promoted the chip as capable of 66 MIPS. The i960CA microarchitecture was designed in 1987–1988 and formally announced on September 12, 1989. Later, the i960CF included a floating-point unit, but continued to omit an MMU.
).
interface and a two-channel DMA controller.
standard, but this had little success and the design work was eventually ended. By the mid 1990s its price/performance ratio
had fallen behind competing chips of more recent design, and Intel never produced a reduced power-consumption version that could be used in battery-powered systems.
In 1990 the i960 team was redirected to be the "second team" working in parallel on future i386 implementations — specifically the P6 processor, which later became the Pentium Pro
. The i960 project was sent to another, smaller development team, essentially ensuring its ultimate demise.
capable SCSI
disk array host adapter cards as well as Digital Equipment/Compaq/HP's high end SCSI and DSSI
and eventually Fibre Channel
HSx series standalone raid controllers
An i960RS chip also powers Adaptec
's AAR-2400A controller, which uses four commodity parallel ATA drives to build an affordable RAID-5 protected fault tolerant storage system for small PC servers and workstations.
The Intel 960 was also used in some Brocade
Fibre Channel
switches to run Fabric OS
.
The Intel 960 architecture is also used in slot machine
s. Currently they are found in IGT
's Stepper S2000 family and i960 video family. It was also used as the main CPU of Sega's
famous Model 2 series of arcade boards.
The Indian HAL Tejas
light combat aircraft's MMR (multi-mode radar) is said to use the i960. Full adoption of the HAL Tejas into Indian Air Force
service might only occur around 2010.
The Indian Space Research Organisation
is said to use the chip in its on board computers in its launch vehicles.
Intel 960 processor is also used in Automatic Radar Plotting Aid
(ARPA) interfacing boards of radar
s from Kelvin Hughes
.
It was also used on some HP X-Terminals
.
Some SATA
RAID
controllers use Intel 80303 IOP (Intelligent I/O Processor) which integrates PCI-to-PCI bridge, memory controller and 80960JT-100 CPU core.
Microprocessor
A microprocessor incorporates the functions of a computer's central processing unit on a single integrated circuit, or at most a few integrated circuits. It is a multipurpose, programmable device that accepts digital data as input, processes it according to instructions stored in its memory, and...
design that became popular during the early 1990s as an embedded
Embedded system
An embedded system is a computer system designed for specific control functions within a larger system. often with real-time computing constraints. It is embedded as part of a complete device often including hardware and mechanical parts. By contrast, a general-purpose computer, such as a personal...
microcontroller
Microcontroller
A microcontroller is a small computer on a single integrated circuit containing a processor core, memory, and programmable input/output peripherals. Program memory in the form of NOR flash or OTP ROM is also often included on chip, as well as a typically small amount of RAM...
, becoming a best-selling CPU in that field, along with the competing AMD 29000. In spite of its success, Intel dropped i960 marketing in the late 1990s as a side effect of a settlement with DEC
Digital Equipment Corporation
Digital Equipment Corporation was a major American company in the computer industry and a leading vendor of computer systems, software and peripherals from the 1960s to the 1990s...
in which Intel received the rights to produce the StrongARM
StrongARM
The StrongARM is a family of microprocessors that implemented the ARM V4 instruction set architecture . It was developed by Digital Equipment Corporation and later sold to Intel, who continued to manufacture it before replacing it with the XScale....
CPU. The processor continues to be used in a few military applications.
Origin
The i960 design was started as a response to the failure of Intel's iAPX 432Intel iAPX 432
The Intel iAPX 432 was a commercially unsuccessful 32-bit microprocessor architecture, introduced in 1981.The project was Intel's first 32-bit microprocessor design, and intended to be the company's main product line for the 1980s. Many advanced multitasking and memory management features were...
design of the early 1980s. The iAPX 432 was intended to directly support high-level languages that supported tagged, protected, garbage-collected memory — such as Ada and Lisp
Lisp programming language
Lisp is a family of computer programming languages with a long history and a distinctive, fully parenthesized syntax. Originally specified in 1958, Lisp is the second-oldest high-level programming language in widespread use today; only Fortran is older...
— in hardware. Because of its instruction-set complexity, its multi-chip implementation, and design flaws, the iAPX 432 was very slow in comparison to other processors of its time.
In 1984 Intel and Siemens
Siemens AG
Siemens AG is a German multinational conglomerate company headquartered in Munich, Germany. It is the largest Europe-based electronics and electrical engineering company....
started a joint project, ultimately called BiiN
BiiN
BiiN was a company created out of a joint research project by Intel and Siemens to develop fault tolerant high-performance multi-processor computers build on custom microprocessor designs. BiiN was an outgrowth of the Intel iAPX 432 multiprocessor project, ancestor of iPSC and nCUBE.The company was...
, to create a high-end fault-tolerant object-oriented computer system programmed entirely in Ada. Many of the original i432 team members joined this project, though a new lead architect was brought in from IBM, Glenford Myers
Glenford Myers
Glenford Myers is an American computer scientist, entrepreneur, and author. He founded two successful high-tech companies , authored eight textbooks in the computer sciences, and made important contributions in microprocessor architecture...
. The intended market for the BiiN systems were high-reliability computer users such as banks, industrial systems and nuclear power plants.
Intel's major contribution to the BiiN system was a new processor design, influenced by the protected-memory concepts from the i432. The new design included a number of features to improve performance and avoid problems that had led to the downfall of the i432, which resulted in the i960 design. The first 960 processors entered the final stages of design, known as taping-out, in October 1985 and were sent to manufacturing that month, with the first working chips arriving in late 1985 and early 1986.
The BiiN effort eventually failed, due to market forces, and the 960MX was left without a use. Myers attempted to save the design by outlining several subsets of the full capability architecture created for the BiiN system. He tried to convince Intel management to market the i960 (then still known as the "P7") as a general-purpose processor, both in place of the Intel 80286
Intel 80286
The Intel 80286 , introduced on 1 February 1982, was a 16-bit x86 microprocessor with 134,000 transistors. Like its contemporary simpler cousin, the 80186, it could correctly execute most software written for the earlier Intel 8086 and 8088...
and i386 (which taped-out the same month as the first i960), as well as the emerging RISC market for Unix
Unix
Unix is a multitasking, multi-user computer operating system originally developed in 1969 by a group of AT&T employees at Bell Labs, including Ken Thompson, Dennis Ritchie, Brian Kernighan, Douglas McIlroy, and Joe Ossanna...
systems, including a pitch to Steve Jobs
Steve Jobs
Steven Paul Jobs was an American businessman and inventor widely recognized as a charismatic pioneer of the personal computer revolution. He was co-founder, chairman, and chief executive officer of Apple Inc...
's for use in the NeXT
NeXT
Next, Inc. was an American computer company headquartered in Redwood City, California, that developed and manufactured a series of computer workstations intended for the higher education and business markets...
system. Competition within and outside of Intel came not only from the i386 camp, but also from the i860
Intel i860
The Intel i860 was a RISC microprocessor from Intel, first released in 1989. The i860 was one of Intel's first attempts at an entirely new, high-end instruction set since the failed Intel i432 from the 1980s...
processor, yet another RISC processor design emerging within Intel at the time. Myers was unsuccessful at convincing Intel management to support the i960 as a general-purpose or Unix processor, but the chip found a ready market in early high-performance 32-bit embedded systems.
Architecture
To avoid the performance issues that plagued the i432, the central i960 instruction-set architecture was a RISC design, only implemented in full in the i960MX, and the memory subsystem was made 33-bits wide — for a 32-bit word and a "tag" bit to indicate protected memory. In many other ways the i960 followed the original Berkeley RISCBerkeley RISC
Berkeley RISC was one of two seminal research projects into RISC-based microprocessor design taking place under ARPA's VLSI project. RISC was led by David Patterson at the University of California, Berkeley between 1980 and 1984, while the other was taking place only a short drive away at Stanford...
design, notably in its use of register window
Register window
In computer engineering, the use of register windows is a technique to improve the performance of a particularly common operation, the procedure call...
s, an implementation-specific number of caches for the per-subroutine registers, allowing for fast routine calls. The competing Stanford University
Stanford University
The Leland Stanford Junior University, commonly referred to as Stanford University or Stanford, is a private research university on an campus located near Palo Alto, California. It is situated in the northwestern Santa Clara Valley on the San Francisco Peninsula, approximately northwest of San...
design, commercialized as MIPS
MIPS architecture
MIPS is a reduced instruction set computer instruction set architecture developed by MIPS Technologies . The early MIPS architectures were 32-bit, and later versions were 64-bit...
, did not use this system, relying on the compiler to generate optimal subroutine call and return code instead. Unlike the i386, but in common with most 32-bit designs, the i960 has a flat 32-bit memory space, with no memory segmentation. The i960 architecture also anticipated a superscalar
Superscalar
A superscalar CPU architecture implements a form of parallelism called instruction level parallelism within a single processor. It therefore allows faster CPU throughput than would otherwise be possible at a given clock rate...
implementation, with instructions being simultaneously dispatched to more than one unit within the processor.
i960 variants
The "full" i960MX was never released for the non-military market, but the otherwise identical i960MC was used in high-end embedded applications. The i960MC included all of the features of the original BiiN system, but these were simply not mentioned in the literature, leading many to wonder why the i960MC was so large and had so many pins labeled "no connect".80960Kx
A version of the RISC core without memory management or an FPUFloating point unit
A floating-point unit is a part of a computer system specially designed to carry out operations on floating point numbers. Typical operations are addition, subtraction, multiplication, division, and square root...
became the i960KA, and the RISC core with the FPU became the i960KB. The versions were, however, all identical internally — only the labeling was different. This meant the CPUs were much larger than necessary for the "actually supported" feature sets, and as a result, more expensive to manufacture than they needed to be.
The i960KA became successful as a low-cost 32-bit processor for the laser-printer market, as well as for early graphics terminals and other embedded applications. Its success paid for future generations, which removed the complex memory sub-system.
80960Cx
The i960CA, first announced in July 1989, was the first pure RISC implementation of the i960 architecture. It featured a newly designed superscalar RISC core and added an unusual addressable on-chip cache, but lacked an FPU and MMU, as it was intended for high-performance embedded applications. The i960CA is widely considered to have been the first single-chip superscalarSuperscalar
A superscalar CPU architecture implements a form of parallelism called instruction level parallelism within a single processor. It therefore allows faster CPU throughput than would otherwise be possible at a given clock rate...
RISC implementation. The C-series only included one ALU, but could dispatch and execute an arithmetic instruction, a memory reference, and a branch instruction at the same time, and sustain two instructions per cycle under certain circumstances. The first versions released ran at 33 MHz, and Intel promoted the chip as capable of 66 MIPS. The i960CA microarchitecture was designed in 1987–1988 and formally announced on September 12, 1989. Later, the i960CF included a floating-point unit, but continued to omit an MMU.
80960Jx
The 80960Jx is a processor for embedded applications. It features 32-bit multiplexed address/data bus, instruction and data cache, 1K on-chip RAM, interrupt controller and two independent 32-bit timers. The 80960Jx’s testability features included ONCE (on-circuit emulation) mode and boundary scan (JTAGJTAG
Joint Test Action Group is the common name for what was later standardized as the IEEE 1149.1 Standard Test Access Port and Boundary-Scan Architecture. It was initially devised for testing printed circuit boards using boundary scan and is still widely used for this application.Today JTAG is also...
).
80960VH
Announced October 1998 i960VH Embedded-PCI processor featured 32-bit 33MHz PCI bus and 100MHz i960JT processor core. The core also featured 16KB of instruction cache, 4KB of data cache and 1KB of built-in RAM. Other core features included two 32-bit timers, programmable interrupt controller, I²CI²C
I²C is a multi-master serial single-ended computer bus invented by Philips that is used to attach low-speed peripherals to a motherboard, embedded system, cellphone, or other electronic device. Since the mid 1990s, several competitors I²C ("i-squared cee" or "i-two cee"; Inter-Integrated Circuit;...
interface and a two-channel DMA controller.
Demise
Intel attempted to bolster the i960 in the I/O device controller market with the I2OI2O
Intelligent Input/Output is a defunct computer input/output specification. I2O emerged from Intel in the mid 1990s with the publication of the I2O specification in 1996 by the Intelligent I/O Special Interest Group....
standard, but this had little success and the design work was eventually ended. By the mid 1990s its price/performance ratio
Price/performance ratio
In economics and engineering, the price/performance ratio refers to a product's ability to deliver performance, of any sort, for its price. Generally speaking, products with a higher price/performance ratio are more desirable, excluding other factors....
had fallen behind competing chips of more recent design, and Intel never produced a reduced power-consumption version that could be used in battery-powered systems.
In 1990 the i960 team was redirected to be the "second team" working in parallel on future i386 implementations — specifically the P6 processor, which later became the Pentium Pro
Pentium Pro
The Pentium Pro is a sixth-generation x86 microprocessor developed and manufactured by Intel introduced in November 1, 1995 . It introduced the P6 microarchitecture and was originally intended to replace the original Pentium in a full range of applications...
. The i960 project was sent to another, smaller development team, essentially ensuring its ultimate demise.
Current status
Because of its high performance in calculating XOR values, the Intel 960 processor family is often used to control higher-end, RAIDRAID
RAID is a storage technology that combines multiple disk drive components into a logical unit...
capable SCSI
SCSI
Small Computer System Interface is a set of standards for physically connecting and transferring data between computers and peripheral devices. The SCSI standards define commands, protocols, and electrical and optical interfaces. SCSI is most commonly used for hard disks and tape drives, but it...
disk array host adapter cards as well as Digital Equipment/Compaq/HP's high end SCSI and DSSI
Digital Storage Systems Interconnect
The Digital Storage Systems Interconnect is a bus developed by Digital Equipment Corporation for connecting storage devices and clustering VAX systems and support was extended to MIPS based DECsystem and later to Alpha processor based AlphaServer systems.It was introduced in 1988 and has a...
and eventually Fibre Channel
Fibre Channel
Fibre Channel, or FC, is a gigabit-speed network technology primarily used for storage networking. Fibre Channel is standardized in the T11 Technical Committee of the InterNational Committee for Information Technology Standards , an American National Standards Institute –accredited standards...
HSx series standalone raid controllers
An i960RS chip also powers Adaptec
Adaptec
Adaptec is a computer hardware brand owned by PMC-Sierra that is used on some of its host adapters for connecting storage devices to computers. The production line of Adaptec is in Indonesia. Products are made to interface with SCSI, Serial ATA, and Serial attached SCSI. Some of its host adapters...
's AAR-2400A controller, which uses four commodity parallel ATA drives to build an affordable RAID-5 protected fault tolerant storage system for small PC servers and workstations.
The Intel 960 was also used in some Brocade
Brocade Communications Systems
Brocade Communications Systems, Inc. , based in Silicon Valley , is a vendor of storage area network hardware and software. The company also designs, manufactures, and sells networking products and management applications for local, metro, and wide area networks...
Fibre Channel
Fibre Channel
Fibre Channel, or FC, is a gigabit-speed network technology primarily used for storage networking. Fibre Channel is standardized in the T11 Technical Committee of the InterNational Committee for Information Technology Standards , an American National Standards Institute –accredited standards...
switches to run Fabric OS
Fabric OS
In storage area networking, Fabric OS is the firmware for Brocade Communications Systems's Fibre Channel switches and Fibre Channel directors. It is also known as FOS and Fabos.-First generation:...
.
The Intel 960 architecture is also used in slot machine
Slot machine
A slot machine , informally fruit machine , the slots , poker machine or "pokies" or simply slot is a casino gambling machine with three or more reels which spin when a button is pushed...
s. Currently they are found in IGT
International Game Technology
International Game Technology is a Nevada based company specializing in the design, development, manufacturing, sales and distribution of gaming machines and network system products internationally, as well as online and mobile gaming solutions for regulated markets. The company's main offices are...
's Stepper S2000 family and i960 video family. It was also used as the main CPU of Sega's
Sega
, usually styled as SEGA, is a multinational video game software developer and an arcade software and hardware development company headquartered in Ōta, Tokyo, Japan, with various offices around the world...
famous Model 2 series of arcade boards.
The Indian HAL Tejas
HAL Tejas
The HAL Tejas is a lightweight multirole fighter developed by India. It is a tailless, compound delta-wing design powered by a single engine. It came from the Light Combat Aircraft programme, which began in the 1980s to replace India's ageing MiG-21 fighters...
light combat aircraft's MMR (multi-mode radar) is said to use the i960. Full adoption of the HAL Tejas into Indian Air Force
Indian Air Force
The Indian Air Force is the air arm of the Indian armed forces. Its primary responsibility is to secure Indian airspace and to conduct aerial warfare during a conflict...
service might only occur around 2010.
The Indian Space Research Organisation
Indian Space Research Organisation
The Indian Space Research Organisation is an independent Indian governmental agency established in 1969 for the research and development of vehicles and activities for the exploration of space within and outside of Earth’s atmosphere. Headquartered in Bangalore...
is said to use the chip in its on board computers in its launch vehicles.
Intel 960 processor is also used in Automatic Radar Plotting Aid
Automatic Radar Plotting Aid
A marine radar with automatic radar plotting aid capability can create tracks using radar contacts. The system can calculate the tracked object's course, speed and closest point of approach , thereby knowing if there is a danger of collision with the other ship or landmass.Development of ARPA...
(ARPA) interfacing boards of radar
Radar
Radar is an object-detection system which uses radio waves to determine the range, altitude, direction, or speed of objects. It can be used to detect aircraft, ships, spacecraft, guided missiles, motor vehicles, weather formations, and terrain. The radar dish or antenna transmits pulses of radio...
s from Kelvin Hughes
Kelvin Hughes
Kelvin Hughes Ltd is a designer and manufacturer of marine navigation systems and a supplier of navigational data to both the commercial marine and government marketplace...
.
It was also used on some HP X-Terminals
HP X-Terminals
HP X-Terminals are a line of X terminals from Hewlett Packard introduced in the early- to mid-1990s, including the 700/X and 700/RX, Envizex and Entria, and the Envizex II and Entria II. They were often sold alongside PA-RISC-based HP 9000 Unix systems...
.
Some SATA
Sata
Sata is a traditional dish from the Malaysian state of Terengganu, consisting of spiced fish meat wrapped in banana leaves and cooked on a grill.It is a type of Malaysian fish cake, or otak-otak...
RAID
RAID
RAID is a storage technology that combines multiple disk drive components into a logical unit...
controllers use Intel 80303 IOP (Intelligent I/O Processor) which integrates PCI-to-PCI bridge, memory controller and 80960JT-100 CPU core.
External links
- i960 homepage at Intel
- i960 images and descriptions at cpu-collection.de
- Intel i960 ID Guide
- BiiN CPU Architecture Reference Manual (describes i960MX instruction set), authored by Randal L. SchwartzRandal L. SchwartzRandal L. Schwartz , also known as merlyn, is an American author, system administrator and programming consultant.-Career:...