Intel i860
Encyclopedia
The Intel i860 was a RISC microprocessor
from Intel, first released in 1989. The i860 was one of Intel's first attempts at an entirely new, high-end instruction set
since the failed Intel i432 from the 1980s. It was released with considerable fanfare, slightly obscuring the earlier Intel i960
which was successful in some niches of embedded system
s, and which many considered to be a better design. The i860 never achieved commercial success and the project was terminated in the mid-1990s.
Andy Grove blamed the i860's failure in the marketplace on Intel being stretched too thin:
ALU
"Core" along with a 64-bit
FPU
that was itself built in three parts: an adder, a multiplier, and a graphics processor. The system had separate pipelines for the ALU, floating point adder and multiplier, and could hand off up to three operations per clock. (I.e., two instructions - one integer instruction and one floating point multiply-and-accumulate instruction per clock.)
All of the buses were at least 64 bits wide. The internal memory bus to the cache, for instance, was 128 bits wide. Both units had thirty-two 32-bit registers, but the FPU used its set as sixteen 64-bit registers. Instructions for the ALU were fetched two at a time to use the full external bus. The IEEE and Intel referred to the design as the "i860 64-Bit Microprocessor".
Intel i860 instructions acted on data sizes from 8-bit through 128-bit.
The graphics unit was unique for the era. It was essentially a 64-bit integer unit using the FPU
registers as eight 128-bit registers. It supported a number of commands for SIMD
-like instructions in addition to basic 64-bit integer math. Experience with the i860 influenced the MMX functionality later added to Intel's Pentium processors.
One unusual feature of the i860 was that the pipelines into the functional units were program-accessible, requiring the compiler
s to order instructions carefully in the object code
to keep the pipelines filled. In traditional architectures these duties were handled at runtime by a scheduler on the CPU itself, but the complexity of these systems limited their application in early RISC designs. The i860 was an attempt to avoid this entirely by moving this duty off-chip into the compiler. This allowed the i860 to devote more room to functional units, improving performance. As a result of its architecture, the i860 could run certain graphics and floating point algorithms with exceptionally high speed, but its performance in general-purpose applications suffered and it was difficult to program efficiently (see below).
. For instance, an instruction to add two numbers will take considerably longer if the data are not in the cache, yet there is no way for the programmer to know if they are or not. If an incorrect guess is made, the entire pipeline will stall, waiting for the data. The entire i860 design was based on the compiler efficiently handling this task, which proved almost impossible in practice. While theoretically capable of peaking at about 60-80 MFLOPS for both single precision and double precision
for the XP versions, hand-coded assemblers managed to get only about up to 40 MFLOPS, and most compilers had difficulty getting even 10 MFLOPs.
Another serious problem was the lack of any solution to handle context switch
ing quickly. The i860 had several pipelines (for the ALU and FPU parts) and an interrupt could spill them and require them all to be re-loaded. This took 62 cycles in the best case, and almost 2000 cycles in the worst. The latter is 1/20000th of a second at 40 MHz (50 microseconds), an eternity for a CPU. This largely eliminated the i860 as a general purpose CPU.
The chip was released in two versions, the basic XR (code named N10), and the XP (code named N11). The XP added larger on-chip caches, a second level cache, faster buses, and hardware support for bus snooping, for cache consistency in parallel computing
systems. The XR ran at 25 or 40 MHz, and a process shrink for the XP (from 1 micrometre to 0.8) bumped the XR to 40 and 50 MHz. Both ran the same instruction set.
At first the i860 was only used in a small number of very large machines like the iPSC/860
at Los Alamos National Laboratory
. As the compilers improved, the general performance of the i860 did likewise, but by then most other RISC designs had already passed the i860 in performance.
Intel for a time tested the viability of the i860 as a workstation CPU, competing with the MIPS Architecture
chips and others. Microsoft initially developed what was to become Windows NT
on internally-designed i860-based workstations (codenamed Dazzle), only porting NT to the MIPS
(Microsoft Jazz
), Intel 386 and other processors later. The NT designation originally referred to the "N-Ten" (i860 XR) processor.
The i860 did see some use in the workstation
world as a graphics accelerator. It was used, for instance, in the NeXTdimension
, where it ran a cut-down version of the Mach kernel running a complete PostScript
stack. However, the PostScript
part of the project was never finished so it ended up just moving color pixels around. In this role the i860 design worked considerably better, as the core program could be loaded into the cache and made entirely "predictable", allowing the compilers to get the ordering right. Truevision
produced an i860-based accelerator board intended for use with their Targa and Vista framebuffer cards. Pixar
produced a custom version of RenderMan to run on the card that ran approximately 4 times faster than the 386 host. Another example was SGI
RealityEngine
, which used a number of i860XP processors in its geometry engine. This sort of use slowly disappeared as well, as more general-purpose CPUs started to match the i860's performance, and as Intel turned its focus to Pentium processors for general-purpose computing.
Mercury Computer Systems
used the i860 in their multicomputer. From 2 to 360 compute nodes would reside in a circuit switched
fat tree
network, with each node having local memory that could be mapped by any other node. Each node in this heterogeneous system could be an i860, a PowerPC
, or a group of three SHARC
DSPs. Good performance was obtained from the i860 by supplying customers with a library of signal processing functions written in assembly language. The hardware packed up to 360 compute nodes in 9U
of rack
space, making it suitable for mobile applications such as airborne radar processing.
During the early 1990's, Stratus Technologies
built i860-based servers, the XA/R series, running their proprietary VOS
operating system.
In the late 1990s Intel replaced their entire RISC line with ARM
-based designs, known as the XScale
. Confusingly, the 860 number has since been re-used for a motherboard control chipset for Intel Xeon
(high-end Pentium) systems.
Microprocessor
A microprocessor incorporates the functions of a computer's central processing unit on a single integrated circuit, or at most a few integrated circuits. It is a multipurpose, programmable device that accepts digital data as input, processes it according to instructions stored in its memory, and...
from Intel, first released in 1989. The i860 was one of Intel's first attempts at an entirely new, high-end instruction set
Instruction set
An instruction set, or instruction set architecture , is the part of the computer architecture related to programming, including the native data types, instructions, registers, addressing modes, memory architecture, interrupt and exception handling, and external I/O...
since the failed Intel i432 from the 1980s. It was released with considerable fanfare, slightly obscuring the earlier Intel i960
Intel i960
Intel's i960 was a RISC-based microprocessor design that became popular during the early 1990s as an embedded microcontroller, becoming a best-selling CPU in that field, along with the competing AMD 29000...
which was successful in some niches of embedded system
Embedded system
An embedded system is a computer system designed for specific control functions within a larger system. often with real-time computing constraints. It is embedded as part of a complete device often including hardware and mechanical parts. By contrast, a general-purpose computer, such as a personal...
s, and which many considered to be a better design. The i860 never achieved commercial success and the project was terminated in the mid-1990s.
Andy Grove blamed the i860's failure in the marketplace on Intel being stretched too thin:
Technical features
The i860 combined a number of features that were unique at the time, most notably its VLIW (Very Long Instruction Word) architecture and powerful support for high-speed floating point operations. The design mounted a 32-bit32-bit
The range of integer values that can be stored in 32 bits is 0 through 4,294,967,295. Hence, a processor with 32-bit memory addresses can directly access 4 GB of byte-addressable memory....
ALU
Arithmetic logic unit
In computing, an arithmetic logic unit is a digital circuit that performs arithmetic and logical operations.The ALU is a fundamental building block of the central processing unit of a computer, and even the simplest microprocessors contain one for purposes such as maintaining timers...
"Core" along with a 64-bit
64-bit
64-bit is a word size that defines certain classes of computer architecture, buses, memory and CPUs, and by extension the software that runs on them. 64-bit CPUs have existed in supercomputers since the 1970s and in RISC-based workstations and servers since the early 1990s...
FPU
Floating point unit
A floating-point unit is a part of a computer system specially designed to carry out operations on floating point numbers. Typical operations are addition, subtraction, multiplication, division, and square root...
that was itself built in three parts: an adder, a multiplier, and a graphics processor. The system had separate pipelines for the ALU, floating point adder and multiplier, and could hand off up to three operations per clock. (I.e., two instructions - one integer instruction and one floating point multiply-and-accumulate instruction per clock.)
All of the buses were at least 64 bits wide. The internal memory bus to the cache, for instance, was 128 bits wide. Both units had thirty-two 32-bit registers, but the FPU used its set as sixteen 64-bit registers. Instructions for the ALU were fetched two at a time to use the full external bus. The IEEE and Intel referred to the design as the "i860 64-Bit Microprocessor".
Intel i860 instructions acted on data sizes from 8-bit through 128-bit.
The graphics unit was unique for the era. It was essentially a 64-bit integer unit using the FPU
Floating point unit
A floating-point unit is a part of a computer system specially designed to carry out operations on floating point numbers. Typical operations are addition, subtraction, multiplication, division, and square root...
registers as eight 128-bit registers. It supported a number of commands for SIMD
SIMD
Single instruction, multiple data , is a class of parallel computers in Flynn's taxonomy. It describes computers with multiple processing elements that perform the same operation on multiple data simultaneously...
-like instructions in addition to basic 64-bit integer math. Experience with the i860 influenced the MMX functionality later added to Intel's Pentium processors.
One unusual feature of the i860 was that the pipelines into the functional units were program-accessible, requiring the compiler
Compiler
A compiler is a computer program that transforms source code written in a programming language into another computer language...
s to order instructions carefully in the object code
Object code
Object code, or sometimes object module, is what a computer compiler produces. In a general sense object code is a sequence of statements in a computer language, usually a machine code language....
to keep the pipelines filled. In traditional architectures these duties were handled at runtime by a scheduler on the CPU itself, but the complexity of these systems limited their application in early RISC designs. The i860 was an attempt to avoid this entirely by moving this duty off-chip into the compiler. This allowed the i860 to devote more room to functional units, improving performance. As a result of its architecture, the i860 could run certain graphics and floating point algorithms with exceptionally high speed, but its performance in general-purpose applications suffered and it was difficult to program efficiently (see below).
Performance (problems)
On paper, performance was impressive for a single-chip solution; however, real-world performance was anything but. One problem, perhaps unrecognized at the time, was that runtime code paths are difficult to predict, meaning that it becomes exceedingly difficult to order instructions properly at compile timeCompile time
In computer science, compile time refers to either the operations performed by a compiler , programming language requirements that must be met by source code for it to be successfully compiled , or properties of the program that can be reasoned about at compile time.The operations performed at...
. For instance, an instruction to add two numbers will take considerably longer if the data are not in the cache, yet there is no way for the programmer to know if they are or not. If an incorrect guess is made, the entire pipeline will stall, waiting for the data. The entire i860 design was based on the compiler efficiently handling this task, which proved almost impossible in practice. While theoretically capable of peaking at about 60-80 MFLOPS for both single precision and double precision
Double precision
In computing, double precision is a computer number format that occupies two adjacent storage locations in computer memory. A double-precision number, sometimes simply called a double, may be defined to be an integer, fixed point, or floating point .Modern computers with 32-bit storage locations...
for the XP versions, hand-coded assemblers managed to get only about up to 40 MFLOPS, and most compilers had difficulty getting even 10 MFLOPs.
Another serious problem was the lack of any solution to handle context switch
Context switch
A context switch is the computing process of storing and restoring the state of a CPU so that execution can be resumed from the same point at a later time. This enables multiple processes to share a single CPU. The context switch is an essential feature of a multitasking operating system...
ing quickly. The i860 had several pipelines (for the ALU and FPU parts) and an interrupt could spill them and require them all to be re-loaded. This took 62 cycles in the best case, and almost 2000 cycles in the worst. The latter is 1/20000th of a second at 40 MHz (50 microseconds), an eternity for a CPU. This largely eliminated the i860 as a general purpose CPU.
Versions and applications
Parallel computing
Parallel computing is a form of computation in which many calculations are carried out simultaneously, operating on the principle that large problems can often be divided into smaller ones, which are then solved concurrently . There are several different forms of parallel computing: bit-level,...
systems. The XR ran at 25 or 40 MHz, and a process shrink for the XP (from 1 micrometre to 0.8) bumped the XR to 40 and 50 MHz. Both ran the same instruction set.
At first the i860 was only used in a small number of very large machines like the iPSC/860
Intel iPSC/860
The Intel iPSC/860 was a massively parallel supercomputer launched by Intel in 1990. It followed the Intel iPSC/2 and was superseded by the Intel Paragon. The iPSC/860 consisted of up to 128 processing elements connected in a hypercube topology, each element consisting of an Intel i860 or Intel 386...
at Los Alamos National Laboratory
Los Alamos National Laboratory
Los Alamos National Laboratory is a United States Department of Energy national laboratory, managed and operated by Los Alamos National Security , located in Los Alamos, New Mexico...
. As the compilers improved, the general performance of the i860 did likewise, but by then most other RISC designs had already passed the i860 in performance.
Intel for a time tested the viability of the i860 as a workstation CPU, competing with the MIPS Architecture
MIPS architecture
MIPS is a reduced instruction set computer instruction set architecture developed by MIPS Technologies . The early MIPS architectures were 32-bit, and later versions were 64-bit...
chips and others. Microsoft initially developed what was to become Windows NT
Windows NT
Windows NT is a family of operating systems produced by Microsoft, the first version of which was released in July 1993. It was a powerful high-level-language-based, processor-independent, multiprocessing, multiuser operating system with features comparable to Unix. It was intended to complement...
on internally-designed i860-based workstations (codenamed Dazzle), only porting NT to the MIPS
MIPS architecture
MIPS is a reduced instruction set computer instruction set architecture developed by MIPS Technologies . The early MIPS architectures were 32-bit, and later versions were 64-bit...
(Microsoft Jazz
Jazz (computer)
The Jazz computer architecture was a motherboard and chipset design originally developed by Microsoft for use in developing Windows NT. The design was eventually used as the basis for most MIPS-based Windows NT systems....
), Intel 386 and other processors later. The NT designation originally referred to the "N-Ten" (i860 XR) processor.
The i860 did see some use in the workstation
Workstation
A workstation is a high-end microcomputer designed for technical or scientific applications. Intended primarily to be used by one person at a time, they are commonly connected to a local area network and run multi-user operating systems...
world as a graphics accelerator. It was used, for instance, in the NeXTdimension
NeXTdimension
NeXTdimension was an accelerated 32-bit color board manufactured and sold by NeXT from 1990 that gave the NeXTcube color capabilities with PostScript. The NeXTBus, a NuBus like implementation card was a full size card for the NeXTcube, filling one of four slots, another one being filled with the...
, where it ran a cut-down version of the Mach kernel running a complete PostScript
PostScript
PostScript is a dynamically typed concatenative programming language created by John Warnock and Charles Geschke in 1982. It is best known for its use as a page description language in the electronic and desktop publishing areas. Adobe PostScript 3 is also the worldwide printing and imaging...
stack. However, the PostScript
PostScript
PostScript is a dynamically typed concatenative programming language created by John Warnock and Charles Geschke in 1982. It is best known for its use as a page description language in the electronic and desktop publishing areas. Adobe PostScript 3 is also the worldwide printing and imaging...
part of the project was never finished so it ended up just moving color pixels around. In this role the i860 design worked considerably better, as the core program could be loaded into the cache and made entirely "predictable", allowing the compilers to get the ordering right. Truevision
Truevision
Truevision, Inc. was a maker of digital video processing add-on boards for PC computers. It was founded by Cathleen Asch, Carl Calabria, Joseph Haaf, Bryan Hunt, Brad Pillow, Joe Shepard and Jeff Walters and others when AT&T split off their Electronic Photography and Imaging Center in 1987...
produced an i860-based accelerator board intended for use with their Targa and Vista framebuffer cards. Pixar
Pixar
Pixar Animation Studios, pronounced , is an American computer animation film studio based in Emeryville, California. The studio has earned 26 Academy Awards, seven Golden Globes, and three Grammy Awards, among many other awards and acknowledgments. Its films have made over $6.3 billion worldwide...
produced a custom version of RenderMan to run on the card that ran approximately 4 times faster than the 386 host. Another example was SGI
Silicon Graphics
Silicon Graphics, Inc. was a manufacturer of high-performance computing solutions, including computer hardware and software, founded in 1981 by Jim Clark...
RealityEngine
RealityEngine
RealityEngine refers to a 3D graphics hardware architecture and a family of graphics systems that implemented the aforementioned hardware architecture that was developed and manufactured by Silicon Graphics during the early to mid 1990s...
, which used a number of i860XP processors in its geometry engine. This sort of use slowly disappeared as well, as more general-purpose CPUs started to match the i860's performance, and as Intel turned its focus to Pentium processors for general-purpose computing.
Mercury Computer Systems
Mercury Computer Systems
Mercury Computer Systems, Inc. provides high-performance embedded, real-time digital signal and image processing solutions.Mercury designs and builds embedded multicomputers, which may be considered to be either loosely coupled NUMA computers or tightly coupled clusters. Despite being marketed as...
used the i860 in their multicomputer. From 2 to 360 compute nodes would reside in a circuit switched
Circuit switching
Circuit switching is a methodology of implementing a telecommunications network in which two network nodes establish a dedicated communications channel through the network before the nodes may communicate. The circuit guarantees the full bandwidth of the channel and remains connected for the...
fat tree
Fat tree
The fat tree network, invented by Charles E. Leiserson of MIT, is a universal network for provably efficient communication. Unlike an ordinary computer scientist's notion of a tree, which has "skinny" links all over, the links in a fat-tree become "fatter" as one moves up the tree towards the root...
network, with each node having local memory that could be mapped by any other node. Each node in this heterogeneous system could be an i860, a PowerPC
PowerPC
PowerPC is a RISC architecture created by the 1991 Apple–IBM–Motorola alliance, known as AIM...
, or a group of three SHARC
Super Harvard Architecture Single-Chip Computer
The Super Harvard Architecture Single-Chip Computer is a high performance floating-point and fixed-point DSP from Analog Devices,...
DSPs. Good performance was obtained from the i860 by supplying customers with a library of signal processing functions written in assembly language. The hardware packed up to 360 compute nodes in 9U
Rack unit
A rack unit or U is a unit of measure used to describe the height of equipment intended for mounting in a 19-inch rack or a 23-inch rack...
of rack
19-inch rack
A 19-inch rack is a standardized frame or enclosure for mounting multiple equipment modules. Each module has a front panel that is wide, including edges or ears that protrude on each side which allow the module to be fastened to the rack frame with screws.-Overview and history:Equipment designed...
space, making it suitable for mobile applications such as airborne radar processing.
During the early 1990's, Stratus Technologies
Stratus Technologies
Stratus Technologies, Inc. a major producer of fault tolerant computer servers. The company was founded in 1980 as Stratus Computer, Inc. in Natick, Massachusetts, and adopted its present name in 1999. The current CEO and president is Dave Laurello. Stratus Technologies, Inc. is a privately held...
built i860-based servers, the XA/R series, running their proprietary VOS
Stratus VOS
VOS is a proprietary operating system running on Stratus Technologies fault-tolerant computer systems. VOS is available on Stratus's ftServer and Continuum platforms...
operating system.
In the late 1990s Intel replaced their entire RISC line with ARM
ARM architecture
ARM is a 32-bit reduced instruction set computer instruction set architecture developed by ARM Holdings. It was named the Advanced RISC Machine, and before that, the Acorn RISC Machine. The ARM architecture is the most widely used 32-bit ISA in numbers produced...
-based designs, known as the XScale
XScale
The XScale, a microprocessor core, is Intel's and Marvell's implementation of the ARMv5 architecture, and consists of several distinct families: IXP, IXC, IOP, PXA and CE . Intel sold the PXA family to Marvell Technology Group in June 2006....
. Confusingly, the 860 number has since been re-used for a motherboard control chipset for Intel Xeon
Xeon
The Xeon is a brand of multiprocessing- or multi-socket-capable x86 microprocessors from Intel Corporation targeted at the non-consumer server, workstation and embedded system markets.-Overview:...
(high-end Pentium) systems.
External links
- i860 images and description.
- Rhodehamel, Michael W. "The Bus Interface and Paging Units of the i860(tm) Microprocessor". In Proc. IEEE International Conference on Computer Design, p. 380–384, 1989.