Tejas and Jayhawk
Encyclopedia
Tejas was a code name for Intel
's microprocessor
which was to be a successor to the latest Pentium 4
with the Prescott core. Jayhawk was a code name for its Xeon
counterpart. The cancellation of the processors in May 2004 underscored Intel's historical transition of its focus on single-core processors to multi-core processors.
In early 2003, Intel showed the design of Tejas and a plan to release it sometime in 2004, but put it off to 2005 later. Intel, however, announced it canceled the development on May 7, 2004. Analysts attribute the delay and eventual cancellation to the heat problems due to the extreme power consumption of the core, as that was the case in development of Prescott and its mediocre performance increase over Northwood. This cancellation reflected Intel's intention to focus on dual-core chips for the Itanium
platform. With respect to desktop processors, Intel's development efforts shifted to the Pentium M microarchitecture (itself a derivative of the P6 microarchitecture
) used in the Centrino
notebook platform, which offered a processing power to power consumption ratio considerably higher than that offered by Prescott and other NetBurst based designs. The outcome of these development efforts was the Intel Core
processor line, and later the Intel Core 2
line, providing and building on the benefits of Pentium M and offering Intel's first native dual core products for desktops and laptops.
This transition marks the end of the NetBurst line of CPU
development from Intel that started back with the original Pentium 4
.
, while the 65 nm chip would increase the cache to 2 MB. There was also to be a dual core version of Tejas called Cedarmill (or Cedar Mill depending on the source). This Cedarmill should not be confused with the 65 nm Cedar Mill-based Pentium 4, which appears to be what the codename was recycled for. The trace cache capacity would likely have been increased, and the number of pipeline stages was increased to between 40 and 50 stages. There would have been an improved version of Hyper-Threading
, as well as a new version of SSE
, which was later backported to the Intel Core 2 series after Tejas's cancellation and named SSSE3
. Tejas was slated to operate at frequencies of 7 GHz
or higher, more than twice the clock speed of the fastest-clocked Core 2 processor, which is clocked at 3.33 GHz. However, Tejas would likely have performed worse, as it would have executed fewer instructions per clock cycle, and it would have run hotter as well with a TDP much higher than the Prescott core of Pentium 4. The CPU was canceled late in its development after it had reached its tapeout phase.
Intel Corporation
Intel Corporation is an American multinational semiconductor chip maker corporation headquartered in Santa Clara, California, United States and the world's largest semiconductor chip maker, based on revenue. It is the inventor of the x86 series of microprocessors, the processors found in most...
's microprocessor
Microprocessor
A microprocessor incorporates the functions of a computer's central processing unit on a single integrated circuit, or at most a few integrated circuits. It is a multipurpose, programmable device that accepts digital data as input, processes it according to instructions stored in its memory, and...
which was to be a successor to the latest Pentium 4
Pentium 4
Pentium 4 was a line of single-core desktop and laptop central processing units , introduced by Intel on November 20, 2000 and shipped through August 8, 2008. They had a 7th-generation x86 microarchitecture, called NetBurst, which was the company's first all-new design since the introduction of the...
with the Prescott core. Jayhawk was a code name for its Xeon
Xeon
The Xeon is a brand of multiprocessing- or multi-socket-capable x86 microprocessors from Intel Corporation targeted at the non-consumer server, workstation and embedded system markets.-Overview:...
counterpart. The cancellation of the processors in May 2004 underscored Intel's historical transition of its focus on single-core processors to multi-core processors.
In early 2003, Intel showed the design of Tejas and a plan to release it sometime in 2004, but put it off to 2005 later. Intel, however, announced it canceled the development on May 7, 2004. Analysts attribute the delay and eventual cancellation to the heat problems due to the extreme power consumption of the core, as that was the case in development of Prescott and its mediocre performance increase over Northwood. This cancellation reflected Intel's intention to focus on dual-core chips for the Itanium
Itanium
Itanium is a family of 64-bit Intel microprocessors that implement the Intel Itanium architecture . Intel markets the processors for enterprise servers and high-performance computing systems...
platform. With respect to desktop processors, Intel's development efforts shifted to the Pentium M microarchitecture (itself a derivative of the P6 microarchitecture
P6 (microarchitecture)
The P6 microarchitecture is the sixth generation Intel x86 microarchitecture, implemented by the Pentium Pro microprocessor that was introduced in November 1995. It is sometimes referred to as i686. It was succeeded by the NetBurst microarchitecture in 2000, but eventually revived in the Pentium M...
) used in the Centrino
Centrino
The Centrino brand represents Intel Wi-Fi and WiMAX adapters. It was formerly a platform-marketing initiative from Intel until January 7, 2010....
notebook platform, which offered a processing power to power consumption ratio considerably higher than that offered by Prescott and other NetBurst based designs. The outcome of these development efforts was the Intel Core
Intel Core
Yonah was the code name for Intel's first generation of 65 nm process mobile microprocessors, based on the Banias/Dothan-core Pentium M microarchitecture. SIMD performance has been improved through the addition of SSE3 instructions and improvements to SSE and SSE2 implementations, while integer...
processor line, and later the Intel Core 2
Intel Core 2
Core 2 is a brand encompassing a range of Intel's consumer 64-bit x86-64 single-, dual-, and quad-core microprocessors based on the Core microarchitecture. The single- and dual-core models are single-die, whereas the quad-core models comprise two dies, each containing two cores, packaged in a...
line, providing and building on the benefits of Pentium M and offering Intel's first native dual core products for desktops and laptops.
This transition marks the end of the NetBurst line of CPU
Central processing unit
The central processing unit is the portion of a computer system that carries out the instructions of a computer program, to perform the basic arithmetical, logical, and input/output operations of the system. The CPU plays a role somewhat analogous to the brain in the computer. The term has been in...
development from Intel that started back with the original Pentium 4
Pentium 4
Pentium 4 was a line of single-core desktop and laptop central processing units , introduced by Intel on November 20, 2000 and shipped through August 8, 2008. They had a 7th-generation x86 microarchitecture, called NetBurst, which was the company's first all-new design since the introduction of the...
.
Design and microarchitecture
Tejas would have built on the Pentium 4's NetBurst microarchitecture. Tejas was to originally be built on a 90 nm process, later moving to a 65 nm process. The 90 nm version of the processor was reported to have 1 MB L2 cacheCache
In computer engineering, a cache is a component that transparently stores data so that future requests for that data can be served faster. The data that is stored within a cache might be values that have been computed earlier or duplicates of original values that are stored elsewhere...
, while the 65 nm chip would increase the cache to 2 MB. There was also to be a dual core version of Tejas called Cedarmill (or Cedar Mill depending on the source). This Cedarmill should not be confused with the 65 nm Cedar Mill-based Pentium 4, which appears to be what the codename was recycled for. The trace cache capacity would likely have been increased, and the number of pipeline stages was increased to between 40 and 50 stages. There would have been an improved version of Hyper-Threading
Hyper-threading
Hyper-threading is Intel's term for its simultaneous multithreading implementation in its Atom, Intel Core i3/i5/i7, Itanium, Pentium 4 and Xeon CPUs....
, as well as a new version of SSE
SSE
-Computing:*Server-sent events, a technology to push content to web clients*Simple Sharing Extensions, a specification that extends RSS from unidirectional to bidirectional information flows*SPARQL Syntax Expressions*Microsoft SQL Server Express Edition...
, which was later backported to the Intel Core 2 series after Tejas's cancellation and named SSSE3
SSSE3
Supplemental Streaming SIMD Extensions 3 is a SIMD instruction set created by Intel and is the fourth iteration of the SSE technology.- History :...
. Tejas was slated to operate at frequencies of 7 GHz
GHZ
GHZ or GHz may refer to:# Gigahertz .# Greenberger-Horne-Zeilinger state — a quantum entanglement of three particles.# Galactic Habitable Zone — the region of a galaxy that is favorable to the formation of life....
or higher, more than twice the clock speed of the fastest-clocked Core 2 processor, which is clocked at 3.33 GHz. However, Tejas would likely have performed worse, as it would have executed fewer instructions per clock cycle, and it would have run hotter as well with a TDP much higher than the Prescott core of Pentium 4. The CPU was canceled late in its development after it had reached its tapeout phase.