HLH Orion
Encyclopedia
The Orion was a series of 32-bit
super-minicomputer
s designed and produced in the 1980s by High Level Hardware Limited (HLH), a company based in Oxford
, UK
. The company produced four versions of the machine:
All four machines employed the same I/O sub-system.
-based Research Machines Limited. Both partners were previously senior members of Research Machine's Special Projects Group. In 1984, as a result of that research, High Level Hardware launched the Orion, a high performance, microcodeable, UNIX
superminicomputer targeted particularly at scientific applications such as mathematical modeling, artificial intelligence
and symbolic algebra.
In April 1987 High Level Hardware introduced a series of Orions based upon the Fairchild Clipper processor but abandoned the hardware market in late 1989 to concentrate on high-end Apple Macintosh sales.
was writable; in other words, its instruction set
could be redefined. This facility was used to customise some Orions with instruction sets optimised to run the Occam and LISP
programming languages or even to compute fractals.
that was built around the Am2901 bit-sliced microprocessor
. To this a byte manipulation unit was added which could perform the shifting, rotating and masking operation required for handling eight and sixteen bit data. Additional logic was provided to support both signed and unsigned two's complement
comparisons in a single operation, multiple precision arithmetic and floating point
normalization. Most operations could be performed in 150 ns, however the cycle time was variable from 125 ns to 200 ns under microprogram control so that timing could be optimized. A microsequencer, based around the Am2910, directed the control flow though the microprogram. It could perform branches, loops and subroutine calls most of which could be conditional on any of several CPU status conditions.
The CPU instruction decoder, decoded machine level instructions (as opposed to micro-instructions). This was achieved by using map tables held in fast parity checked RAM which mapped one byte opcode
s onto micro-instruction addresses. Control was transferred to these addresses using a special sequencer operation which was performed in parallel with other CPU functions. Hence instruction decoding overlapped instruction execution.
An escape mechanism was provided to allow the instruction set to be expanded beyond the 256 entries selected by any one opcode. A further mechanism existed to switch between several sets of dispatch tables, allowing the machine to support multiple instruction sets concurrently. Using this mechanism a different instruction set could be selected each time a context switch occurred. This mechanism was also used to implement privileged instruction, dynamic profiling (for performance monitoring) and multiple CPU modes (e. g. User and Kernel
).
The role of the cache memory, independent of the main memory, was to hold the top of an evaluation stack for a procedure oriented language. The cache had a two cycle latency after which it could deliver one word per cycle and was divided into a number of pages each with 512 32-bit words with parity protection. The pages were grouped in pairs with an architectural maximum of 16 pairs. The original machine implemented two pairs. The second member of each pair was typically used as additional fast registers and scratch storage without affecting the stack page. The lower nine bits of the CPU register, which addressed the cache, was implemented with counters and allowed increment and decrement operations (push and pop) as wells as random access.
In the original implementation, each main memory module contained 0.5 Mbytes of storage with parity protection constructed using 64K dynamic MOS RAMs. Random access cycle time was 500 ns per 32-bit word but multi-word transfers, for example to and from the cache, yielded an effective cycle time of 250 ns per 32-bit word (16 Mbytes per second). The memory modules decoded 26-bit physical word addresses and within this limit total memory capacity was restricted only by the number of available system bus slots; depending on the I/O configuration of the system, up to 10 Mbytes of physical memory could be installed. A later implementation of the memory module increased the size to 2 MB using 256K RAMs.
Logical to physical address translation was carried out using a set of address translation tables. Each process has access to three
independently extensible regions of memory, used typically for program, heap and stack. A fourth region was normally reserved for the operating system. The tables also contained a set of rights bits for each memory page giving full protection and supporting the implementation of demand paged virtual memory. The translation tables were cached in the CPU resulting, in most cases, in an overhead of only one microinstruction when performing address translation. The page size which was fixed by the hardware, was 4 Kbytes. Each logical region could be up to 256 Mbytes.
s to perform low level tasks such as running diagnostics and managing terminal
s and disks.
The diagnostic microcomputer (based around the Zilog Z80
) was embedded within the CPU. Its functions included running a system confidence check when power is first applied, bootstrapping the CPU, and taking control should an unrecoverable control store parity error be detected. It could also be used to load new microcode dynamically whilst the machine was running. An RS-232C interface was provided to which a terminal could be attached. Extensive diagnostics could then be run in conjunction with special microcode to perform fault analysis in the event of a system failure. Problems could usually be isolated to one or two integrated circuits.
One or more intelligent I/O channels controlled peripheral activity. Each of these included a full function microcomputer based around the Z80 which performed control functions and housekeeping. Data transfers to and from peripheral devices took place via a direct memory access
(DMA) path itself constructed using Am2901 bit-slice microprocessors. This allowed the full performance of the Orion memory system and of the peripheral device to be exploited, with the microcomputer able to take corrective action on soft I/O errors. Software on the Orion communicated with the microcomputer using a high level message passing protocol.
UNIX
operating system
.
The Clipper-powered Orions ran OTS version 2.x, a port of the 4.2BSD UNIX
with some additions. This was not notably reliable or secure, and had a tendency to 'forget' process user IDs, randomly leaving user processes running as root
.
HLH also produced a graphics terminal
for the Orion called the StarPoint, to which they ported the X Window System
.
The Orion series was moderately popular with the computer science
departments of British universities, including Bath
, Edinburgh
, Heriot-Watt
, Kent
, Southampton
, Warwick
, York
. A typical multi-user
Orion configuration would have had 8 MB
of RAM
, an SMD
hard disk
(eg. a 168 MB Kennedy or a 434 MB Fujitsu
Eagle), a 60 MB QIC-24 tape drive and 8 to 32 RS-232
terminal
ports.
32-bit
The range of integer values that can be stored in 32 bits is 0 through 4,294,967,295. Hence, a processor with 32-bit memory addresses can directly access 4 GB of byte-addressable memory....
super-minicomputer
Minicomputer
A minicomputer is a class of multi-user computers that lies in the middle range of the computing spectrum, in between the largest multi-user systems and the smallest single-user systems...
s designed and produced in the 1980s by High Level Hardware Limited (HLH), a company based in Oxford
Oxford
The city of Oxford is the county town of Oxfordshire, England. The city, made prominent by its medieval university, has a population of just under 165,000, with 153,900 living within the district boundary. It lies about 50 miles north-west of London. The rivers Cherwell and Thames run through...
, UK
United Kingdom
The United Kingdom of Great Britain and Northern IrelandIn the United Kingdom and Dependencies, other languages have been officially recognised as legitimate autochthonous languages under the European Charter for Regional or Minority Languages...
. The company produced four versions of the machine:
- The original Orion, sometimes referred to as the "Microcodeable Orion".
- The Orion 1/05, in which the microcodeable CPU was replaced with the much faster FairchildFairchild SemiconductorFairchild Semiconductor International, Inc. is an American semiconductor company based in San Jose, California. Founded in 1957, it was a pioneer in transistor and integrated circuit manufacturing...
ClipperClipper architectureThe Clipper architecture is a 32-bit RISC-like instruction set architecture designed by Fairchild Semiconductor. The architecture never enjoyed much market success, and the only computer manufacturers to create major product lines using Clipper processors were Intergraph and High Level Hardware...
RISC C-100 processor providing approximately 5.5 MIPS of integer performance and 1 Mflop of double precision floating point performance.
- The Orion 1/07 which offered approximately 33% greater performance over the 1/05 (7.3 MIPS and 1.33 Mflops).
- The Orion 1/10 based on a later generation C-300 ClipperClipperA clipper was a very fast sailing ship of the 19th century that had three or more masts and a square rig. They were generally narrow for their length, could carry limited bulk freight, small by later 19th century standards, and had a large total sail area...
from the Advanced Processor Division at IntergraphIntergraphIntergraph Corporation is an American software development and services company. It provides enterprise engineering and geospatially powered software to businesses, governments, and organizations around the world. Intergraph operates through two divisions: Process, Power & Marine and Security,...
Corporation that required extensive cooling. The Orion 1/10 offered a further 30% improvement for integer and single precision floating point operations and over 150% improvement for double precision floating point (10 MIPS and 3 Mflops).
All four machines employed the same I/O sub-system.
Background
High Level Hardware was an independent British company formed in early 1982 by David G. Small and Timothy B. Robinson. David Small was previously a founder shareholder and director of OxfordOxford
The city of Oxford is the county town of Oxfordshire, England. The city, made prominent by its medieval university, has a population of just under 165,000, with 153,900 living within the district boundary. It lies about 50 miles north-west of London. The rivers Cherwell and Thames run through...
-based Research Machines Limited. Both partners were previously senior members of Research Machine's Special Projects Group. In 1984, as a result of that research, High Level Hardware launched the Orion, a high performance, microcodeable, UNIX
Unix
Unix is a multitasking, multi-user computer operating system originally developed in 1969 by a group of AT&T employees at Bell Labs, including Ken Thompson, Dennis Ritchie, Brian Kernighan, Douglas McIlroy, and Joe Ossanna...
superminicomputer targeted particularly at scientific applications such as mathematical modeling, artificial intelligence
Artificial intelligence
Artificial intelligence is the intelligence of machines and the branch of computer science that aims to create it. AI textbooks define the field as "the study and design of intelligent agents" where an intelligent agent is a system that perceives its environment and takes actions that maximize its...
and symbolic algebra.
In April 1987 High Level Hardware introduced a series of Orions based upon the Fairchild Clipper processor but abandoned the hardware market in late 1989 to concentrate on high-end Apple Macintosh sales.
Microcodeable Orion
The original Orion employed a processor architecture based on Am2900-series devices. This CPU was novel in that its microcodeMicrocode
Microcode is a layer of hardware-level instructions and/or data structures involved in the implementation of higher level machine code instructions in many computers and other processors; it resides in special high-speed memory and translates machine instructions into sequences of detailed...
was writable; in other words, its instruction set
Instruction set
An instruction set, or instruction set architecture , is the part of the computer architecture related to programming, including the native data types, instructions, registers, addressing modes, memory architecture, interrupt and exception handling, and external I/O...
could be redefined. This facility was used to customise some Orions with instruction sets optimised to run the Occam and LISP
Lisp
A lisp is a speech impediment, historically also known as sigmatism. Stereotypically, people with a lisp are unable to pronounce sibilants , and replace them with interdentals , though there are actually several kinds of lisp...
programming languages or even to compute fractals.
The central processing unit
The CPU consisted of an ALUALU
ALU, alu or Alu may refer to:*Academy of Fine Arts and Design, Ljubljana*Assisted Living Unit, care residency that usually includes the regular provision of a range of personal services*Alcatel-Lucent, a company traded on the NYSE...
that was built around the Am2901 bit-sliced microprocessor
Microprocessor
A microprocessor incorporates the functions of a computer's central processing unit on a single integrated circuit, or at most a few integrated circuits. It is a multipurpose, programmable device that accepts digital data as input, processes it according to instructions stored in its memory, and...
. To this a byte manipulation unit was added which could perform the shifting, rotating and masking operation required for handling eight and sixteen bit data. Additional logic was provided to support both signed and unsigned two's complement
Two's complement
The two's complement of a binary number is defined as the value obtained by subtracting the number from a large power of two...
comparisons in a single operation, multiple precision arithmetic and floating point
Floating point
In computing, floating point describes a method of representing real numbers in a way that can support a wide range of values. Numbers are, in general, represented approximately to a fixed number of significant digits and scaled using an exponent. The base for the scaling is normally 2, 10 or 16...
normalization. Most operations could be performed in 150 ns, however the cycle time was variable from 125 ns to 200 ns under microprogram control so that timing could be optimized. A microsequencer, based around the Am2910, directed the control flow though the microprogram. It could perform branches, loops and subroutine calls most of which could be conditional on any of several CPU status conditions.
The CPU instruction decoder, decoded machine level instructions (as opposed to micro-instructions). This was achieved by using map tables held in fast parity checked RAM which mapped one byte opcode
Opcode
In computer science engineering, an opcode is the portion of a machine language instruction that specifies the operation to be performed. Their specification and format are laid out in the instruction set architecture of the processor in question...
s onto micro-instruction addresses. Control was transferred to these addresses using a special sequencer operation which was performed in parallel with other CPU functions. Hence instruction decoding overlapped instruction execution.
An escape mechanism was provided to allow the instruction set to be expanded beyond the 256 entries selected by any one opcode. A further mechanism existed to switch between several sets of dispatch tables, allowing the machine to support multiple instruction sets concurrently. Using this mechanism a different instruction set could be selected each time a context switch occurred. This mechanism was also used to implement privileged instruction, dynamic profiling (for performance monitoring) and multiple CPU modes (e. g. User and Kernel
Kernel (computing)
In computing, the kernel is the main component of most computer operating systems; it is a bridge between applications and the actual data processing done at the hardware level. The kernel's responsibilities include managing the system's resources...
).
The role of the cache memory, independent of the main memory, was to hold the top of an evaluation stack for a procedure oriented language. The cache had a two cycle latency after which it could deliver one word per cycle and was divided into a number of pages each with 512 32-bit words with parity protection. The pages were grouped in pairs with an architectural maximum of 16 pairs. The original machine implemented two pairs. The second member of each pair was typically used as additional fast registers and scratch storage without affecting the stack page. The lower nine bits of the CPU register, which addressed the cache, was implemented with counters and allowed increment and decrement operations (push and pop) as wells as random access.
The control store
The control store was built using high speed static RAMs. This was normally loaded at bootstrap time, allowing the machine to be fully user microprogrammable. The control store cycle time was 125 ns, equal to the fastest CPU cycle. The architecture allowed for up to 32 Kwords (64 bit word length) of control store however due to the limitation in memory technology the original implementation allowed a maximum of 8 Kwords. The standard configuration had 4 Kwords on a single circuit board. Two such boards could be installed. Parity checking was provided. To achieve the required speed at reasonable cost, a two-level pipeline was employed around the control store. Later a 16 Kword board was implemented giving a maximum control store size of 32 Kwords.Main memory
Main memory was organised as 32-bit words with two-way interleaving, allowing 64 bits of data to be fetched or stored in one operation. In normal operation main memory was accessed via a virtual memory management unit.In the original implementation, each main memory module contained 0.5 Mbytes of storage with parity protection constructed using 64K dynamic MOS RAMs. Random access cycle time was 500 ns per 32-bit word but multi-word transfers, for example to and from the cache, yielded an effective cycle time of 250 ns per 32-bit word (16 Mbytes per second). The memory modules decoded 26-bit physical word addresses and within this limit total memory capacity was restricted only by the number of available system bus slots; depending on the I/O configuration of the system, up to 10 Mbytes of physical memory could be installed. A later implementation of the memory module increased the size to 2 MB using 256K RAMs.
Logical to physical address translation was carried out using a set of address translation tables. Each process has access to three
independently extensible regions of memory, used typically for program, heap and stack. A fourth region was normally reserved for the operating system. The tables also contained a set of rights bits for each memory page giving full protection and supporting the implementation of demand paged virtual memory. The translation tables were cached in the CPU resulting, in most cases, in an overhead of only one microinstruction when performing address translation. The page size which was fixed by the hardware, was 4 Kbytes. Each logical region could be up to 256 Mbytes.
The input/output subsystem
The Orion I/O subsystems included a number of attached microcomputerMicrocomputer
A microcomputer is a computer with a microprocessor as its central processing unit. They are physically small compared to mainframe and minicomputers...
s to perform low level tasks such as running diagnostics and managing terminal
Computer terminal
A computer terminal is an electronic or electromechanical hardware device that is used for entering data into, and displaying data from, a computer or a computing system...
s and disks.
The diagnostic microcomputer (based around the Zilog Z80
Zilog Z80
The Zilog Z80 is an 8-bit microprocessor designed by Zilog and sold from July 1976 onwards. It was widely used both in desktop and embedded computer designs as well as for military purposes...
) was embedded within the CPU. Its functions included running a system confidence check when power is first applied, bootstrapping the CPU, and taking control should an unrecoverable control store parity error be detected. It could also be used to load new microcode dynamically whilst the machine was running. An RS-232C interface was provided to which a terminal could be attached. Extensive diagnostics could then be run in conjunction with special microcode to perform fault analysis in the event of a system failure. Problems could usually be isolated to one or two integrated circuits.
One or more intelligent I/O channels controlled peripheral activity. Each of these included a full function microcomputer based around the Z80 which performed control functions and housekeeping. Data transfers to and from peripheral devices took place via a direct memory access
Direct memory access
Direct memory access is a feature of modern computers that allows certain hardware subsystems within the computer to access system memory independently of the central processing unit ....
(DMA) path itself constructed using Am2901 bit-slice microprocessors. This allowed the full performance of the Orion memory system and of the peripheral device to be exploited, with the microcomputer able to take corrective action on soft I/O errors. Software on the Orion communicated with the microcomputer using a high level message passing protocol.
Operating system
The operating system for the microcodable Orion was OTS (Orion Time Sharing) version 1.x, a port of the 4.1BSDBerkeley Software Distribution
Berkeley Software Distribution is a Unix operating system derivative developed and distributed by the Computer Systems Research Group of the University of California, Berkeley, from 1977 to 1995...
UNIX
Unix
Unix is a multitasking, multi-user computer operating system originally developed in 1969 by a group of AT&T employees at Bell Labs, including Ken Thompson, Dennis Ritchie, Brian Kernighan, Douglas McIlroy, and Joe Ossanna...
operating system
Operating system
An operating system is a set of programs that manage computer hardware resources and provide common services for application software. The operating system is the most important type of system software in a computer system...
.
The Clipper-powered Orions ran OTS version 2.x, a port of the 4.2BSD UNIX
Unix
Unix is a multitasking, multi-user computer operating system originally developed in 1969 by a group of AT&T employees at Bell Labs, including Ken Thompson, Dennis Ritchie, Brian Kernighan, Douglas McIlroy, and Joe Ossanna...
with some additions. This was not notably reliable or secure, and had a tendency to 'forget' process user IDs, randomly leaving user processes running as root
Superuser
On many computer operating systems, the superuser is a special user account used for system administration. Depending on the operating system, the actual name of this account might be: root, administrator or supervisor....
.
HLH also produced a graphics terminal
Computer terminal
A computer terminal is an electronic or electromechanical hardware device that is used for entering data into, and displaying data from, a computer or a computing system...
for the Orion called the StarPoint, to which they ported the X Window System
X Window System
The X window system is a computer software system and network protocol that provides a basis for graphical user interfaces and rich input device capability for networked computers...
.
The Orion series was moderately popular with the computer science
Computer science
Computer science or computing science is the study of the theoretical foundations of information and computation and of practical techniques for their implementation and application in computer systems...
departments of British universities, including Bath
University of Bath
The University of Bath is a campus university located in Bath, United Kingdom. It received its Royal Charter in 1966....
, Edinburgh
University of Edinburgh
The University of Edinburgh, founded in 1583, is a public research university located in Edinburgh, the capital of Scotland, and a UNESCO World Heritage Site. The university is deeply embedded in the fabric of the city, with many of the buildings in the historic Old Town belonging to the university...
, Heriot-Watt
Heriot-Watt University
Heriot-Watt University is a university based in Edinburgh, Scotland. The name commemorates George Heriot, the 16th century financier to King James, and James Watt, the great 18th century inventor and engineer....
, Kent
University of Kent
The University of Kent, previously the University of Kent at Canterbury, is a public research university based in Kent, United Kingdom...
, Southampton
University of Southampton
The University of Southampton is a British public university located in the city of Southampton, England, a member of the Russell Group. The origins of the university can be dated back to the founding of the Hartley Institution in 1862 by Henry Robertson Hartley. In 1902, the Institution developed...
, Warwick
University of Warwick
The University of Warwick is a public research university located in Coventry, United Kingdom...
, York
University of York
The University of York , is an academic institution located in the city of York, England. Established in 1963, the campus university has expanded to more than thirty departments and centres, covering a wide range of subjects...
. A typical multi-user
Multi-user
Multi-user is a term that defines an operating system or application software that allows concurrent access by multiple users of a computer. Time-sharing systems are multi-user systems. Most batch processing systems for mainframe computers may also be considered "multi-user", to avoid leaving the...
Orion configuration would have had 8 MB
Megabyte
The megabyte is a multiple of the unit byte for digital information storage or transmission with two different values depending on context: bytes generally for computer memory; and one million bytes generally for computer storage. The IEEE Standards Board has decided that "Mega will mean 1 000...
of RAM
Ram
-Animals:*Ram, an uncastrated male sheep*Ram cichlid, a species of freshwater fish endemic to Colombia and Venezuela-Military:*Battering ram*Ramming, a military tactic in which one vehicle runs into another...
, an SMD
Storage Module Device
Storage Module Device was a family of storage devices first shipped by Control Data Corporation in December 1973 as the CDC 9760 40 MB storage module disk drive. The CDC 9762 80 MB variant was announced in June 1974 and the CDC 9764 150 MB and the CDC 9766 300 MB variants were announced in 1975...
hard disk
Hard disk
A hard disk drive is a non-volatile, random access digital magnetic data storage device. It features rotating rigid platters on a motor-driven spindle within a protective enclosure. Data is magnetically read from and written to the platter by read/write heads that float on a film of air above the...
(eg. a 168 MB Kennedy or a 434 MB Fujitsu
Fujitsu
is a Japanese multinational information technology equipment and services company headquartered in Tokyo, Japan. It is the world's third-largest IT services provider measured by revenues....
Eagle), a 60 MB QIC-24 tape drive and 8 to 32 RS-232
RS-232
In telecommunications, RS-232 is the traditional name for a series of standards for serial binary single-ended data and control signals connecting between a DTE and a DCE . It is commonly used in computer serial ports...
terminal
Computer terminal
A computer terminal is an electronic or electromechanical hardware device that is used for entering data into, and displaying data from, a computer or a computing system...
ports.