TopoR
Encyclopedia
TopoR is a Russian topological router for printed circuit board
s laid out in any compatible systems that use the PCAD ASCII PCB, PADS ASCII PCB, or DSN format.
1996 saw the release of the first version of a topological router that actually came to be used by industrial enterprises. The FreeStyle Router ran under MS-DOS
and successfully routed dual-layer boards. This early router showed the advantages of an innovative approach to routing and high efficiency of the models, algorithms, and software implementation. A 1.44MB floppy disk was enough for the program and accompanying examples; the routing was much faster and better than competitive products.
The first Windows
version of the topological router was released in 2001 and named TopoR. The program routed not only dual-layer but also multilayer printed circuit boards.
systems, TopoR dramatically reduces the total wire length and number of vias. TopoR successfully routes both single-layer and high-density multilayer boards.
Routing of the wiring topology is done automatically and flexibly; angles are not limited to 90º and 45º.
Efficient use of PCB space and absence of preferred routing directions in layers considerably reduces electromagnetic crosstalks.
TopoR routes all connections, even if this entails violating design constraints. Such violations can be automatically corrected later. On densely-packed boards this feature is crucial, because it helps assess both the possibility and workload for manual adjustments.
When you move objects (such as components and vias) around, wire length and shape are optimized automatically with appropriate clearance. This considerably simplifies the process of editing without making you care about observing design constraints.
The user is free to choose from two ways to calculate the wire shape: with or without arcs. The first method involves wires consisting of lines only. The other makes wires keep appropriate clearance when circling pads and consist of arcs and lines.
TopoR simultaneously optimizes several alternative variants of the layout. Variants with the worst parameters (total wire length and number of vias) will be removed. This approach allows the distributed routing mechanism to be used, which improves the speed of routing. According to the authors of TopoR, distributed routing will be available in a future release.
TopoR has an automatic component placement feature. The procedure can be used both for all components of the board and only for components in a specific area. It is not comparable to the quality of the manual placement, but it can be used as a preparation step for manual placement.
The minimum and desired clearances for each net can be specified.
TopoR automatically reduces the width of a wire that approaches a narrow pad (or one with a diameter that is less than the width of the wire), or when it passes through bottlenecks (for example, between the pads of a component).
Wire-to-pad transitions use teardrop-style smoothing. The use of this procedure at the design stage helps avoid violations in design-rule checking when teardrops are added in the CAM editor.
TopoR can recognize BGA (Ball Grid Array
) component areas and apply a special strategy for routing them. This helps reduce the number of vias, the density of connections, and in some cases the number of routing layers.
TopoR is very effective for routing single-layer printed circuit boards, because it guarantees (within a particular layout) the absolute minimum of vias. During routing, TopoR either finds a single-layer solution or an alternative with as few vias as possible.
Printed circuit board
A printed circuit board, or PCB, is used to mechanically support and electrically connect electronic components using conductive pathways, tracks or signal traces etched from copper sheets laminated onto a non-conductive substrate. It is also referred to as printed wiring board or etched wiring...
s laid out in any compatible systems that use the PCAD ASCII PCB, PADS ASCII PCB, or DSN format.
History
Work on a flexible topological router began in 1988, when it became clear that the traditional methods of routing with regular and irregular grids (grid-based routers and shape-based routers) and consecutive wiring with locked-down geometry were a dead-end solution.1996 saw the release of the first version of a topological router that actually came to be used by industrial enterprises. The FreeStyle Router ran under MS-DOS
MS-DOS
MS-DOS is an operating system for x86-based personal computers. It was the most commonly used member of the DOS family of operating systems, and was the main operating system for IBM PC compatible personal computers during the 1980s to the mid 1990s, until it was gradually superseded by operating...
and successfully routed dual-layer boards. This early router showed the advantages of an innovative approach to routing and high efficiency of the models, algorithms, and software implementation. A 1.44MB floppy disk was enough for the program and accompanying examples; the routing was much faster and better than competitive products.
The first Windows
Microsoft Windows
Microsoft Windows is a series of operating systems produced by Microsoft.Microsoft introduced an operating environment named Windows on November 20, 1985 as an add-on to MS-DOS in response to the growing interest in graphical user interfaces . Microsoft Windows came to dominate the world's personal...
version of the topological router was released in 2001 and named TopoR. The program routed not only dual-layer but also multilayer printed circuit boards.
General information
Compared to other CADComputer-aided design
Computer-aided design , also known as computer-aided design and drafting , is the use of computer technology for the process of design and design-documentation. Computer Aided Drafting describes the process of drafting with a computer...
systems, TopoR dramatically reduces the total wire length and number of vias. TopoR successfully routes both single-layer and high-density multilayer boards.
Routing of the wiring topology is done automatically and flexibly; angles are not limited to 90º and 45º.
Efficient use of PCB space and absence of preferred routing directions in layers considerably reduces electromagnetic crosstalks.
TopoR routes all connections, even if this entails violating design constraints. Such violations can be automatically corrected later. On densely-packed boards this feature is crucial, because it helps assess both the possibility and workload for manual adjustments.
When you move objects (such as components and vias) around, wire length and shape are optimized automatically with appropriate clearance. This considerably simplifies the process of editing without making you care about observing design constraints.
The user is free to choose from two ways to calculate the wire shape: with or without arcs. The first method involves wires consisting of lines only. The other makes wires keep appropriate clearance when circling pads and consist of arcs and lines.
TopoR simultaneously optimizes several alternative variants of the layout. Variants with the worst parameters (total wire length and number of vias) will be removed. This approach allows the distributed routing mechanism to be used, which improves the speed of routing. According to the authors of TopoR, distributed routing will be available in a future release.
TopoR has an automatic component placement feature. The procedure can be used both for all components of the board and only for components in a specific area. It is not comparable to the quality of the manual placement, but it can be used as a preparation step for manual placement.
The minimum and desired clearances for each net can be specified.
TopoR automatically reduces the width of a wire that approaches a narrow pad (or one with a diameter that is less than the width of the wire), or when it passes through bottlenecks (for example, between the pads of a component).
Wire-to-pad transitions use teardrop-style smoothing. The use of this procedure at the design stage helps avoid violations in design-rule checking when teardrops are added in the CAM editor.
TopoR can recognize BGA (Ball Grid Array
Ball grid array
A ball grid array is a type of surface-mount packaging used for integrated circuits.- Description :The BGA is descended from the pin grid array , which is a package with one face covered with pins in a grid pattern. These pins conduct electrical signals from the integrated circuit to the printed...
) component areas and apply a special strategy for routing them. This helps reduce the number of vias, the density of connections, and in some cases the number of routing layers.
TopoR is very effective for routing single-layer printed circuit boards, because it guarantees (within a particular layout) the absolute minimum of vias. During routing, TopoR either finds a single-layer solution or an alternative with as few vias as possible.
Publications in German
- Luzin S., Polubasov O. Optimierung von Layouts mit TopoR. // Produktion von Leiterplatten und Systemen. #9. 2008. S.1852-1856.
- Probleme beim Routing von Leiterplatten mit BGA-Komponenten (S.J. Luzin, G.S. Petrosjan, O.B. Polubasov) Produktion von Leiterplatten und Systemen. #2. 2009. S.263-270.
Publications in Russian
- CHIP NEWS:
- Electronics, #5, 2005
- Electronic components:
- Modern electronics journal: