Scalable POWERparallel
Encyclopedia
Scalable POWERparallel or SP is an IBM
supercomputer
platform. The nodes are based on the RS/6000
with clustering software called PSSP which is mainly written in Perl
. Some of the technologies developed include the High Performance Switch (HPS) for internode communication.
IBM
International Business Machines Corporation or IBM is an American multinational technology and consulting corporation headquartered in Armonk, New York, United States. IBM manufactures and sells computer hardware and software, and it offers infrastructure, hosting and consulting services in areas...
supercomputer
Supercomputer
A supercomputer is a computer at the frontline of current processing capacity, particularly speed of calculation.Supercomputers are used for highly calculation-intensive tasks such as problems including quantum physics, weather forecasting, climate research, molecular modeling A supercomputer is a...
platform. The nodes are based on the RS/6000
RS/6000
RISC System/6000, or RS/6000 for short, is a family of RISC and UNIX based servers, workstations and supercomputers made by IBM in the 1990s. The RS/6000 family replaced the IBM RT computer platform in February 1990 and was the first computer line to see the use of IBM's POWER and PowerPC based...
with clustering software called PSSP which is mainly written in Perl
Perl
Perl is a high-level, general-purpose, interpreted, dynamic programming language. Perl was originally developed by Larry Wall in 1987 as a general-purpose Unix scripting language to make report processing easier. Since then, it has undergone many changes and revisions and become widely popular...
. Some of the technologies developed include the High Performance Switch (HPS) for internode communication.
POWER1-based
| Model | # of CPUs | CPU | CPU MHz | Cache | Memory | Introduced | Discontinued |
|---|---|---|---|---|---|---|---|
| SP1 | 1 | POWER1++ POWER1 The POWER1 is a multi-chip CPU developed and fabricated by IBM that implemented the POWER instruction set architecture . It was originally known as the “RISC System/6000 CPU” or when an abbreviated form, the “RS/6000 CPU” before introduction of successors required the original name to be replaced... |
62.5 | None | 64 to 256 MB | 1993-02-02 | 1994-12-16 |
POWER2-based
| Model | # of CPUs | CPU | CPU MHz | L2 Cache | Memory | Introduced | Discontinued |
|---|---|---|---|---|---|---|---|
| Thin 1 | 1 | POWER2 POWER2 The POWER2, originally named RIOS2, is a processor designed by IBM that implemented the POWER instruction set architecture. The POWER2 was the successor of the POWER1, debuting in September 1993 within IBM's RS/6000 systems. When introduced, the POWER2 was the fastest microprocessor, surpassing the... |
66 | ? | 64 to 512 MB | 1995-08-22 | 1996-12-20 |
| Thin 2 | ? | ? | 1997-06-27 | ||||
| Wide 1 | ? | 64 MB to 2 GB | 1996-12-20 | ||||
| Wide 2 | 77 | ? | ? | 1997-06-27 | |||
PowerPC 604-based
| Model | # of CPUs | CPU | CPU MHz | Cache | Memory | Introduced | Discontinued |
|---|---|---|---|---|---|---|---|
| High 1 | 2, 4, 6, 8 | PowerPC 604 | 112 | ? | ? | 1996-07-23 | 1998-01-08 |
| High 2 | PowerPC 604e | 200 | ? | ? | 1997-08-26 | 1998-04-21 | |
| 332 Thin | 2, 4 | 332 | ? | ? | 1998-04-21 | 2000-12-29 | |
| 332 Wide | ? | ? | |||||
P2SC-based
| Model | # of CPUs | CPU | CPU MHz | Cache | Memory | Introduced | Discontinued |
|---|---|---|---|---|---|---|---|
| 160 Thin | 1 | P2SC | 160 | ? | ? | 1997-10-06 | 1998-04-21 |
| Thin P2SC | 120 | ? | ? | 1996-10-08 | |||
| Wide P2SC | 135 | ? | ? | ||||
POWER3-based
| Model | # of CPUs | CPU | CPU MHz | L2 Cache | Memory | Introduced | Discontinued |
|---|---|---|---|---|---|---|---|
| POWER3 High | 2, 4, 6, 8 | POWER3 POWER3 The POWER3 is a microprocessor, designed and exclusively manufactured by IBM, that implemented the 64-bit version of the PowerPC instruction set architecture , including all of the optional instructions of the ISA such as the POWER2. It was introduced on 5 October 1998, debuting in the RS/6000 43P... |
222 | ? | ? | 1999-09-13 | 2000-12-29 |
| POWER3 High | POWER3-II POWER3 The POWER3 is a microprocessor, designed and exclusively manufactured by IBM, that implemented the 64-bit version of the PowerPC instruction set architecture , including all of the optional instructions of the ISA such as the POWER2. It was introduced on 5 October 1998, debuting in the RS/6000 43P... |
375 | ? | ? | 2000-07-18 | 2002-12-27 | |
| POWER3 Thin | 1, 2 | POWER3 | 200 | ? | ? | 1999-09-01 | 2000-06-30 |
| POWER3 Thin | POWER3-II | 375 | ? | ? | 2000-02-07 | 2003-04-08 | |
| POWER3 Thin | 450 | ? | ? | 2002-01-22 | |||
| POWER3 Wide | 1, 2 | POWER3 | 200 | ? | ? | 1999-02-01 | 2000-06-30 |
| POWER3 Wide | 2, 4 | POWER3-II | 375 | ? | ? | 2000-02-07 | 2003-04-08 |
| POWER3 Wide | 2, 4 | 450 | ? | ? | 2002-01-22 | ||
See also
- IBM POWERIBM POWERPOWER is a reduced instruction set computer instruction set architecture developed by IBM. The name is an acronym for Performance Optimization With Enhanced RISC....
- RS/6000RS/6000RISC System/6000, or RS/6000 for short, is a family of RISC and UNIX based servers, workstations and supercomputers made by IBM in the 1990s. The RS/6000 family replaced the IBM RT computer platform in February 1990 and was the first computer line to see the use of IBM's POWER and PowerPC based...
- POWER1POWER1The POWER1 is a multi-chip CPU developed and fabricated by IBM that implemented the POWER instruction set architecture . It was originally known as the “RISC System/6000 CPU” or when an abbreviated form, the “RS/6000 CPU” before introduction of successors required the original name to be replaced...
- POWER2POWER2The POWER2, originally named RIOS2, is a processor designed by IBM that implemented the POWER instruction set architecture. The POWER2 was the successor of the POWER1, debuting in September 1993 within IBM's RS/6000 systems. When introduced, the POWER2 was the fastest microprocessor, surpassing the...
- POWER3POWER3The POWER3 is a microprocessor, designed and exclusively manufactured by IBM, that implemented the 64-bit version of the PowerPC instruction set architecture , including all of the optional instructions of the ISA such as the POWER2. It was introduced on 5 October 1998, debuting in the RS/6000 43P...
- PowerPC 604