Random logic is a semiconductor circuit design technique that translates high-level logic descriptions directly into hardware features such as AND and OR gates. The name derives from the fact that few easily discernible patterns are evident in the arrangement of features on the chip and in the interconnects between them. In VLSI chips, random logic is often implemented with standard cell

Standard cell

In semiconductor design, standard cell methodology is a method of designing application-specific integrated circuits with mostly digital-logic features. Standard cell methodology is an example of design abstraction, whereby a low-level very-large-scale integration layout is encapsulated into an...

s and gate array

Gate array

A gate array or uncommitted logic array is an approach to the design and manufacture of application-specific integrated circuits...

s.

Random logic accounts for a large part of the circuit design in modern microprocessor

Microprocessor

A microprocessor incorporates the functions of a computer's central processing unit on a single integrated circuit, or at most a few integrated circuits. It is a multipurpose, programmable device that accepts digital data as input, processes it according to instructions stored in its memory, and...

s. Compared to microcode

Microcode

Microcode is a layer of hardware-level instructions and/or data structures involved in the implementation of higher level machine code instructions in many computers and other processors; it resides in special high-speed memory and translates machine instructions into sequences of detailed...

, another popular design technique, random logic offers faster execution of processor opcode

Opcode

In computer science engineering, an opcode is the portion of a machine language instruction that specifies the operation to be performed. Their specification and format are laid out in the instruction set architecture of the processor in question...

s, provided that processor speeds are faster than memory speeds. A disadvantage is that it is difficult to design random logic circuitry for processors with large and complex instruction sets. The hard-wired instruction logic occupies a large percentage of the chip's real estate, and it becomes difficult to lay out the logic so that related circuits are close to one another.