RAM parity
Encyclopedia
RAM parity checking is the storing of a redundant
parity bit
representing the parity (odd or even) of a small amount of computer data (typically one byte) stored in random access memory, and the subsequent comparison of the stored and the computed parity to detect whether a data error has occurred.
The parity bit was originally stored in additional individual memory chips; with the introduction of plug-in DIMM, SIMM, etc. modules, they became available in non-parity and parity (with an extra bit
per byte
, storing 9 bits for every 8 bits of actual data) versions.
If the stored parity is different from the parity computed from the stored data, at least one bit must have been changed due to data corruption. Undetected memory errors can have results ranging from undetectable and without consequence, to permanent corruption of stored data or machine crash. In the case of the home PC where data integrity is often perceived to be of little importance—certainly true for, say games and web browsing, less so for Internet banking and home finances—non-parity memory is an affordable option. However, if data integrity is required, parity memory will halt the computer and prevent the corrupt data from affecting results or stored data, although losing intermediate unstored data and preventing use until any faulty RAM is replaced. For the expense of some computational overhead, of negligible impact with modern fast computers, detected errors can be corrected—this is increasingly important on networked machines serving many users.
Early computers sometimes required the use of parity RAM, and parity-checking could not be disabled. A parity error typically caused the machine to halt, with loss of unsaved data; this is usually a better option than saving corrupt data. Logic parity RAM, also known as fake parity RAM, is non-parity RAM that can be used in computer
s that require parity RAM. Logic parity RAM recalculates an always-valid parity bit each time a byte is read from memory, instead of storing the parity bit when the memory is written to; the calculated parity bit, which will not reveal if the data has been corrupted (hence the name "fake parity"), is presented to the parity-checking logic. It is a means of using cheaper 8-bit RAM in a system designed to use only 9-bit parity RAM.
RAM with ECC or Error Correction Code can detect and correct errors. As with parity RAM, additional information needs to be stored and more processing needs to be done, making ECC RAM more expensive and a little slower than non-parity and logic parity RAM. This type of ECC memory
is especially useful for any application where uptime is a concern: failing bits in a memory word are detected and corrected on the fly with no impact to the application. The occurrence of the error is typically logged by the operating system for analysis by a technical resource. In the case where the error is persistent, server downtime can be scheduled to replace the failing memory unit. This mechanism of detection and correction is known as EEC or Extended Error Correction.
In earlier times faulty memory was relatively common, and parity errors, very noticeable to the user, not infrequent. Since then errors have become less visible as simple parity RAM has fallen out of use; either they are invisible as they are not detected, or they are corrected invisibly with ECC RAM. Modern RAM is believed, with much justification, to be reliable, and error-detecting RAM has largely fallen out of use for non-critical applications. Most machines in the twentyfirst century do not support parity or ECC, with consequent risk of data corruption; this has become acceptable as a consequence of the increased reliability of memory. Some machines that support parity or ECC allow checking to be enabled or disabled in the BIOS
, permitting cheaper non-parity RAM to be used. If parity RAM is used the chipset will usually use it to implement error correction, rather than halting the machine on a single-bit parity error.
However, as discussed in the article on ECC memory
, errors, while not everyday events, are not negligibly infrequent. Even in the absence of manufacturing defects, naturally occurring radiation causes random errors; tests on Google
's very many servers found that memory errors were not rare events, and that the incidence of memory errors and the range of error rates across different DIMMs were much higher than previously reported.
Simple go/no go
parity checking requires that the memory have extra, redundant, bits beyond those needed to store the data; but if extra bits are available, they can be used to correct, as well as detect, errors. Earlier memory as used in, for example, the IBM PC/AT (FPM and EDO memory) were available in versions that supported either no checking or parity checking (in earlier computers that used individual RAM chips rather than DIMM or SIMM modules, extra chips were used to store parity bits); if the computer detected a parity error it would display a message to that effect and stop. The SDRAM
and DDR
modules that replaced the earlier types are usually available either without error-checking or with ECC (full correction, not just parity).
An example of a single-bit error that would be ignored by a system with no error-checking, would halt a machine with parity checking, or would be invisibly corrected by ECC: a single bit is stuck at 1 due to a faulty chip, or becomes changed to 1 due to background or cosmic radiation; a spreadsheet storing numbers in ASCII format is loaded, and the number "8" is stored in the byte which contains the stuck bit as its eighth bit; then another change is made to the spreadsheet and it is stored. However, the "8" (00111000 binary) has become a "9" (00111001).
Redundancy (engineering)
In engineering, redundancy is the duplication of critical components or functions of a system with the intention of increasing reliability of the system, usually in the case of a backup or fail-safe....
parity bit
Parity bit
A parity bit is a bit that is added to ensure that the number of bits with the value one in a set of bits is even or odd. Parity bits are used as the simplest form of error detecting code....
representing the parity (odd or even) of a small amount of computer data (typically one byte) stored in random access memory, and the subsequent comparison of the stored and the computed parity to detect whether a data error has occurred.
The parity bit was originally stored in additional individual memory chips; with the introduction of plug-in DIMM, SIMM, etc. modules, they became available in non-parity and parity (with an extra bit
Bit
A bit is the basic unit of information in computing and telecommunications; it is the amount of information stored by a digital device or other physical system that exists in one of two possible distinct states...
per byte
Byte
The byte is a unit of digital information in computing and telecommunications that most commonly consists of eight bits. Historically, a byte was the number of bits used to encode a single character of text in a computer and for this reason it is the basic addressable element in many computer...
, storing 9 bits for every 8 bits of actual data) versions.
If the stored parity is different from the parity computed from the stored data, at least one bit must have been changed due to data corruption. Undetected memory errors can have results ranging from undetectable and without consequence, to permanent corruption of stored data or machine crash. In the case of the home PC where data integrity is often perceived to be of little importance—certainly true for, say games and web browsing, less so for Internet banking and home finances—non-parity memory is an affordable option. However, if data integrity is required, parity memory will halt the computer and prevent the corrupt data from affecting results or stored data, although losing intermediate unstored data and preventing use until any faulty RAM is replaced. For the expense of some computational overhead, of negligible impact with modern fast computers, detected errors can be corrected—this is increasingly important on networked machines serving many users.
Early computers sometimes required the use of parity RAM, and parity-checking could not be disabled. A parity error typically caused the machine to halt, with loss of unsaved data; this is usually a better option than saving corrupt data. Logic parity RAM, also known as fake parity RAM, is non-parity RAM that can be used in computer
Computer
A computer is a programmable machine designed to sequentially and automatically carry out a sequence of arithmetic or logical operations. The particular sequence of operations can be changed readily, allowing the computer to solve more than one kind of problem...
s that require parity RAM. Logic parity RAM recalculates an always-valid parity bit each time a byte is read from memory, instead of storing the parity bit when the memory is written to; the calculated parity bit, which will not reveal if the data has been corrupted (hence the name "fake parity"), is presented to the parity-checking logic. It is a means of using cheaper 8-bit RAM in a system designed to use only 9-bit parity RAM.
RAM with ECC or Error Correction Code can detect and correct errors. As with parity RAM, additional information needs to be stored and more processing needs to be done, making ECC RAM more expensive and a little slower than non-parity and logic parity RAM. This type of ECC memory
ECC memory
Error-correcting code memory is a type of computer data storage that can detect and correct the more common kinds of internal data corruption...
is especially useful for any application where uptime is a concern: failing bits in a memory word are detected and corrected on the fly with no impact to the application. The occurrence of the error is typically logged by the operating system for analysis by a technical resource. In the case where the error is persistent, server downtime can be scheduled to replace the failing memory unit. This mechanism of detection and correction is known as EEC or Extended Error Correction.
In earlier times faulty memory was relatively common, and parity errors, very noticeable to the user, not infrequent. Since then errors have become less visible as simple parity RAM has fallen out of use; either they are invisible as they are not detected, or they are corrected invisibly with ECC RAM. Modern RAM is believed, with much justification, to be reliable, and error-detecting RAM has largely fallen out of use for non-critical applications. Most machines in the twentyfirst century do not support parity or ECC, with consequent risk of data corruption; this has become acceptable as a consequence of the increased reliability of memory. Some machines that support parity or ECC allow checking to be enabled or disabled in the BIOS
BIOS
In IBM PC compatible computers, the basic input/output system , also known as the System BIOS or ROM BIOS , is a de facto standard defining a firmware interface....
, permitting cheaper non-parity RAM to be used. If parity RAM is used the chipset will usually use it to implement error correction, rather than halting the machine on a single-bit parity error.
However, as discussed in the article on ECC memory
ECC memory
Error-correcting code memory is a type of computer data storage that can detect and correct the more common kinds of internal data corruption...
, errors, while not everyday events, are not negligibly infrequent. Even in the absence of manufacturing defects, naturally occurring radiation causes random errors; tests on Google
Google
Google Inc. is an American multinational public corporation invested in Internet search, cloud computing, and advertising technologies. Google hosts and develops a number of Internet-based services and products, and generates profit primarily from advertising through its AdWords program...
's very many servers found that memory errors were not rare events, and that the incidence of memory errors and the range of error rates across different DIMMs were much higher than previously reported.
Simple go/no go
Go/no go
In general go/no go testing refers to a pass/fail test principle using two boundary conditions.The test is passed only when the Go condition is met and also the No go condition fails....
parity checking requires that the memory have extra, redundant, bits beyond those needed to store the data; but if extra bits are available, they can be used to correct, as well as detect, errors. Earlier memory as used in, for example, the IBM PC/AT (FPM and EDO memory) were available in versions that supported either no checking or parity checking (in earlier computers that used individual RAM chips rather than DIMM or SIMM modules, extra chips were used to store parity bits); if the computer detected a parity error it would display a message to that effect and stop. The SDRAM
SDRAM
Synchronous dynamic random access memory is dynamic random access memory that is synchronized with the system bus. Classic DRAM has an asynchronous interface, which means that it responds as quickly as possible to changes in control inputs...
and DDR
DDR SDRAM
Double data rate synchronous dynamic random access memory is a class of memory integrated circuits used in computers. DDR SDRAM has been superseded by DDR2 SDRAM and DDR3 SDRAM, neither of which are either forward or backward compatible with DDR SDRAM, meaning that DDR2 or DDR3 memory modules...
modules that replaced the earlier types are usually available either without error-checking or with ECC (full correction, not just parity).
An example of a single-bit error that would be ignored by a system with no error-checking, would halt a machine with parity checking, or would be invisibly corrected by ECC: a single bit is stuck at 1 due to a faulty chip, or becomes changed to 1 due to background or cosmic radiation; a spreadsheet storing numbers in ASCII format is loaded, and the number "8" is stored in the byte which contains the stuck bit as its eighth bit; then another change is made to the spreadsheet and it is stored. However, the "8" (00111000 binary) has become a "9" (00111001).