Multimedia Acceleration eXtensions
Encyclopedia
The Multimedia Acceleration eXtensions or MAX are instruction set extensions to the Hewlett-Packard
PA-RISC
instruction set architecture (ISA).
MAX was developed to improve the performance of multimedia applications that were becoming more prevalent during the 1990s.
MAX instructions operate on 32- or 64-bit SIMD
data type
s consisting of multiple 16-bit integers packed in general purpose registers. The available functionality includes additions, subtractions and shifts.
The first version, MAX-1, was for the 32-bit
PA-RISC 1.1 ISA. The second version, MAX-2, was for the 64-bit
PA-RISC 2.0 ISA.
in 1994. It is usually attributed as being the first SIMD
extensions to an ISA. The second version, MAX-2, was for the 64-bit
PA-RISC 2.0 ISA. It was first implemented in the PA-8000
microprocessor released in 1996.
microprocessor and its derivatives.
Hewlett-Packard
Hewlett-Packard Company or HP is an American multinational information technology corporation headquartered in Palo Alto, California, USA that provides products, technologies, softwares, solutions and services to consumers, small- and medium-sized businesses and large enterprises, including...
PA-RISC
PA-RISC
PA-RISC is an instruction set architecture developed by Hewlett-Packard. As the name implies, it is a reduced instruction set computer architecture, where the PA stands for Precision Architecture...
instruction set architecture (ISA).
MAX was developed to improve the performance of multimedia applications that were becoming more prevalent during the 1990s.
MAX instructions operate on 32- or 64-bit SIMD
SIMD
Single instruction, multiple data , is a class of parallel computers in Flynn's taxonomy. It describes computers with multiple processing elements that perform the same operation on multiple data simultaneously...
data type
Data type
In computer programming, a data type is a classification identifying one of various types of data, such as floating-point, integer, or Boolean, that determines the possible values for that type; the operations that can be done on values of that type; the meaning of the data; and the way values of...
s consisting of multiple 16-bit integers packed in general purpose registers. The available functionality includes additions, subtractions and shifts.
The first version, MAX-1, was for the 32-bit
32-bit
The range of integer values that can be stored in 32 bits is 0 through 4,294,967,295. Hence, a processor with 32-bit memory addresses can directly access 4 GB of byte-addressable memory....
PA-RISC 1.1 ISA. The second version, MAX-2, was for the 64-bit
64-bit
64-bit is a word size that defines certain classes of computer architecture, buses, memory and CPUs, and by extension the software that runs on them. 64-bit CPUs have existed in supercomputers since the 1970s and in RISC-based workstations and servers since the early 1990s...
PA-RISC 2.0 ISA.
Implementations
MAX-1 was first implemented with the PA-7100LCPA-7100LC
The PA-7100LC is a microprocessor that implements the PA-RISC 1.1 instruction set architecture developed by Hewlett-Packard . It is also known as the PCX-L, and by its code-name, Hummingbird. It was designed as a low-cost microprocessor for low-end systems. The first systems to feature the...
in 1994. It is usually attributed as being the first SIMD
SIMD
Single instruction, multiple data , is a class of parallel computers in Flynn's taxonomy. It describes computers with multiple processing elements that perform the same operation on multiple data simultaneously...
extensions to an ISA. The second version, MAX-2, was for the 64-bit
64-bit
64-bit is a word size that defines certain classes of computer architecture, buses, memory and CPUs, and by extension the software that runs on them. 64-bit CPUs have existed in supercomputers since the 1970s and in RISC-based workstations and servers since the early 1990s...
PA-RISC 2.0 ISA. It was first implemented in the PA-8000
PA-8000
The PA-8000 , code-named Onyx, is a microprocessor developed and fabricated by Hewlett-Packard that implemented the PA-RISC 2.0 instruction set architecture . It was a completely new design with no circuitry derived from previous PA-RISC microprocessors...
microprocessor released in 1996.
MAX-1
| Instruction | Description |
|---|---|
| HADD | Parallel add with modulo arithmetic |
| HADD,ss | Parallel add with signed saturation |
| HADD,us | Parallel add with unsigned saturation |
| HSUB | Parallel subtract with modulo arithmetic |
| HSUB,ss | Parallel subtract with signed saturation |
| HSUB,us | Parallel subtract with unsigned saturation |
| HAVE | Parallel average |
| HSHLADD | Parallel shift left and add with signed saturation |
| HSHRADD | Parallel shift right and add with signed saturation |
MAX-2
MAX-2 instructions operate on multiple integers in 64-bit quantities. All have a one cycle latency in the PA-8000PA-8000
The PA-8000 , code-named Onyx, is a microprocessor developed and fabricated by Hewlett-Packard that implemented the PA-RISC 2.0 instruction set architecture . It was a completely new design with no circuitry derived from previous PA-RISC microprocessors...
microprocessor and its derivatives.
| Instruction | Description |
|---|---|
| HADD | Parallel add with modulo arithmetic |
| HADD,ss | Parallel add with signed saturation |
| HADD,us | Parallel add with unsigned saturation |
| HSUB | Parallel subtract with modulo arithmetic |
| HSUB,ss | Parallel subtract with signed saturation |
| HSUB,us | Parallel subtract with unsigned saturation |
| HSHLADD | Parallel shift left and add with signed saturation |
| HSHRADD | Parallel shift right and add with signed saturation |
| HAVG | Parallel average |
| HSHR | Parallel shift right signed |
| HSHR,u | Parallel shift right unsigned |
| HSHL | Parallel shift left |
| MIXH | Mix |
| MIXW | Mix |
| PERMH | Permute |