Link register
Encyclopedia
A link register, in many instruction set architectures such as the PowerPC
, ARM
, and the PA-RISC
, is a special purpose register
which holds the address to return to when a function call completes. Other architectures (such as SPARC
) have a register with the same purpose but another name (in this case, "output register 7").
The usage of a link register allows for faster calls to leaf subroutine
s. When the subroutine is non-leaf, passing the result address in a register still results in generation of more efficient code for thunk
s, e.g. for a function whose sole purpose is to call another function with arguments rearranged in some way. Other subroutines can benefit from the use of link register because it can be saved in a batch with other callee-used registers—e.g. an ARM subroutine pushes registers 4-7 along with the link register, LR, by the single instruction
PowerPC
PowerPC is a RISC architecture created by the 1991 Apple–IBM–Motorola alliance, known as AIM...
, ARM
ARM architecture
ARM is a 32-bit reduced instruction set computer instruction set architecture developed by ARM Holdings. It was named the Advanced RISC Machine, and before that, the Acorn RISC Machine. The ARM architecture is the most widely used 32-bit ISA in numbers produced...
, and the PA-RISC
PA-RISC
PA-RISC is an instruction set architecture developed by Hewlett-Packard. As the name implies, it is a reduced instruction set computer architecture, where the PA stands for Precision Architecture...
, is a special purpose register
Processor register
In computer architecture, a processor register is a small amount of storage available as part of a CPU or other digital processor. Such registers are addressed by mechanisms other than main memory and can be accessed more quickly...
which holds the address to return to when a function call completes. Other architectures (such as SPARC
SPARC
SPARC is a RISC instruction set architecture developed by Sun Microsystems and introduced in mid-1987....
) have a register with the same purpose but another name (in this case, "output register 7").
The usage of a link register allows for faster calls to leaf subroutine
Leaf subroutine
A leaf subroutine is a subroutine which cannot in turn call another subroutine. Some compilers can apply special program optimizations to leaf subroutines, such as the use of link registers to avoid having to push the return address on the stack....
s. When the subroutine is non-leaf, passing the result address in a register still results in generation of more efficient code for thunk
Thunk
Thunk may refer to:* Thunk , a piece of code to perform a delayed computation * Thunk : a feature of some virtual function table implementations...
s, e.g. for a function whose sole purpose is to call another function with arguments rearranged in some way. Other subroutines can benefit from the use of link register because it can be saved in a batch with other callee-used registers—e.g. an ARM subroutine pushes registers 4-7 along with the link register, LR, by the single instruction
STMDB SP!, {R4-R7, LR} pipelining all memory writes required.