Intel Paragon
Encyclopedia
The Intel Paragon was a series of massively parallel
supercomputer
s produced by Intel. The Paragon XP/S was a productized version of the experimental Touchstone Delta system built at Caltech, launched in 1992. The Paragon superseded Intel's earlier iPSC/860
system, to which it was closely related.
The Paragon series was based around the Intel i860
RISC microprocessor
. Up to 2048 (later, up to 4000) i860s were connected in a 2D grid. In 1993, an entry-level Paragon XP/E variant was announced with up to 32 compute nodes. The system architecture was a partitioned system, with the majority of the system comprising diskless compute nodes and a small number of I/O nodes interactive service nodes. Since the bulk of the nodes had no permanent storage, it was possible to "Red/Black switch" the compute partition from classified to unclassified by disconnecting one set of I/O nodes with classified disks and then connecting an unclassified I/O partition.
Intel intended the Paragon to run the OSF/1 AD distributed operating system
on all processors. However, this was found to be inefficient in practice, and a light-weight kernel called SUNMOS
was developed at Sandia National Laboratories
to replace OSF/1 AD on the Paragon's compute processors.
The prototype for the Intel Paragon was the Intel Delta, built by Intel with funding from DARPA and installed operationally at the California Institute of Technology
in the late 1980s with funding from the National Science Foundation
. The Delta was one of the few computers to sit significantly above the curve of Moore's Law
.
a serial port
.
The B-NIC ASIC
is the square chip with the heat-sink. Like contemporary CPUs, the i860 did not require any heat sink.
drive interfaces or HiPPI
network connections and were used to provide data to the compute nodes. They did not run any user applications. The MP64 I/O node had three i860 CPUs and an i960 CPU used in the disk controller.
Massively parallel
Massively parallel is a description which appears in computer science, life sciences, medical diagnostics, and other fields.A massively parallel computer is a distributed memory computer system which consists of many individual nodes, each of which is essentially an independent computer in itself,...
supercomputer
Supercomputer
A supercomputer is a computer at the frontline of current processing capacity, particularly speed of calculation.Supercomputers are used for highly calculation-intensive tasks such as problems including quantum physics, weather forecasting, climate research, molecular modeling A supercomputer is a...
s produced by Intel. The Paragon XP/S was a productized version of the experimental Touchstone Delta system built at Caltech, launched in 1992. The Paragon superseded Intel's earlier iPSC/860
Intel iPSC/860
The Intel iPSC/860 was a massively parallel supercomputer launched by Intel in 1990. It followed the Intel iPSC/2 and was superseded by the Intel Paragon. The iPSC/860 consisted of up to 128 processing elements connected in a hypercube topology, each element consisting of an Intel i860 or Intel 386...
system, to which it was closely related.
The Paragon series was based around the Intel i860
Intel i860
The Intel i860 was a RISC microprocessor from Intel, first released in 1989. The i860 was one of Intel's first attempts at an entirely new, high-end instruction set since the failed Intel i432 from the 1980s...
RISC microprocessor
Microprocessor
A microprocessor incorporates the functions of a computer's central processing unit on a single integrated circuit, or at most a few integrated circuits. It is a multipurpose, programmable device that accepts digital data as input, processes it according to instructions stored in its memory, and...
. Up to 2048 (later, up to 4000) i860s were connected in a 2D grid. In 1993, an entry-level Paragon XP/E variant was announced with up to 32 compute nodes. The system architecture was a partitioned system, with the majority of the system comprising diskless compute nodes and a small number of I/O nodes interactive service nodes. Since the bulk of the nodes had no permanent storage, it was possible to "Red/Black switch" the compute partition from classified to unclassified by disconnecting one set of I/O nodes with classified disks and then connecting an unclassified I/O partition.
Intel intended the Paragon to run the OSF/1 AD distributed operating system
Distributed operating system
A distributed operating system is the logical aggregation of operating system software over a collection of independent, networked, communicating, and spatially disseminated computational nodes. Individual system nodes each hold a discrete software subset of the global aggregate operating system...
on all processors. However, this was found to be inefficient in practice, and a light-weight kernel called SUNMOS
SUNMOS
SUNMOS is an operating system jointly developed by Sandia National Laboratories and the Computer Science Department at the University of New Mexico...
was developed at Sandia National Laboratories
Sandia National Laboratories
The Sandia National Laboratories, managed and operated by the Sandia Corporation , are two major United States Department of Energy research and development national laboratories....
to replace OSF/1 AD on the Paragon's compute processors.
The prototype for the Intel Paragon was the Intel Delta, built by Intel with funding from DARPA and installed operationally at the California Institute of Technology
California Institute of Technology
The California Institute of Technology is a private research university located in Pasadena, California, United States. Caltech has six academic divisions with strong emphases on science and engineering...
in the late 1980s with funding from the National Science Foundation
National Science Foundation
The National Science Foundation is a United States government agency that supports fundamental research and education in all the non-medical fields of science and engineering. Its medical counterpart is the National Institutes of Health...
. The Delta was one of the few computers to sit significantly above the curve of Moore's Law
Moore's Law
Moore's law describes a long-term trend in the history of computing hardware: the number of transistors that can be placed inexpensively on an integrated circuit doubles approximately every two years....
.
Compute nodes
The compute boards came in two variants, the GP16 with 16 MB of memory and two CPUs, and the MP16 with three CPUs. Each node had a B-NIC interface that connected to the mesh routers on the backplane. The compute nodes were diskless and performed all I/O over the mesh. During system software development a light-pen was duct-taped to the status LED on one board and a timer interrupt was used to bit bangBit-banging
Bit banging is a technique for serial communications using software instead of dedicated hardware. Software directly sets and samples the state of pins on the microcontroller, and is responsible for all parameters of the signal: timing, levels, synchronization, etc...
a serial port
Serial port
In computing, a serial port is a serial communication physical interface through which information transfers in or out one bit at a time...
.
The B-NIC ASIC
ASIC
ASIC may refer to:* Application-specific integrated circuit, an integrated circuit developed for a particular use, as opposed to a customised general-purpose device.* ASIC programming language, a dialect of BASIC...
is the square chip with the heat-sink. Like contemporary CPUs, the i860 did not require any heat sink.
I/O nodes
The IO boards had either SCSISCSI
Small Computer System Interface is a set of standards for physically connecting and transferring data between computers and peripheral devices. The SCSI standards define commands, protocols, and electrical and optical interfaces. SCSI is most commonly used for hard disks and tape drives, but it...
drive interfaces or HiPPI
HIPPI
HIPPI is a computer bus for the attachment of high speed storage devices to supercomputers. It was popular in the late 1980s and into the mid-to-late 1990s, but has since been replaced by ever-faster standard interfaces like SCSI and Fibre Channel.The first HIPPI standard defined a 50-wire...
network connections and were used to provide data to the compute nodes. They did not run any user applications. The MP64 I/O node had three i860 CPUs and an i960 CPU used in the disk controller.