EnSilica
Encyclopedia
EnSilica is a design services and IP core
company based in Wokingham
, UK. It is known for its eSi-RISC configurable microprocessor
cores for System-on-a-chip
designs. In addition it is a recognized supplier of communications IP under the eSi-Comms family name.
The company has grown at its Wokingham site and now includes a regional expert design center in Cambridge. The company regularly features in articles from Electronics Weekly, Cambridge Wireless, Silicon South West and the National Microelectronics Institute.
. EnSilica licenses its configurable processor core technology and provides three standard configurations eSi-1600, eSi-3200 and eSi-3250 as well as custom architectures.
The eSi-1600 16-bit CPU
core is a low-cost, low-power processor ideal for integration into ASIC
and/or FPGA
designs. It offers similar performance to more expensive 32-bit CPUs while having a system cost comparable to that of 8-bit CPUs. Significant power savings are possible compared to 8-bit CPUs as applications require far fewer clock cycles to run.
The eSi-3200 32-bit CPU core is an extremely small, low-cost, low-power processor ideal for integration into ASIC and/or FPGA designs with on-chip memories. The eSi-3200 is particularly suited to embedded control applications.
The eSi-3250 32-bit CPU is the top-of-the-range member in the eSi-RISC family of processor cores. It is targeted specifically for applications with high performance and large memory requirements.
For applications where high performance is required, the five-stage pipeline allows high clock frequencies to be achieved. While most instructions effectively execute in a single clock cycle, the deep pipeline allows the C and C++ compiler to schedule independent instructions such that instructions that can take multiple cycles to execute, appear to only take one clock cycle. Static branch prediction is employed to minimize the cost of branch instructions.
The eSi-RISC instruction set includes arithmetic and logical instructions (including barrel-shift, multiply and divide), comparisons, load and stores, branches and calls as well as system level instructions to control interrupts and enter lower power states. There are also a number of optional instructions and addressing modes that can be selected, should a specific application require them.
A number of instructions are reserved to allow the user to utilize user defined logic via a simple interface. This allows for otherwise unobtainable performance to be reached for many software inner loops. Instructions are encoded in either 16 or 32-bits, depending upon the size of the operands and the type of instruction. All of the commonly used instructions can be encoded in 16-bits. This ensures that high code density is achieved, while minimizing memory accesses to help conserve power.
The toolchain for eSi-RISC is based upon the industry standard GNU toolchain
, which includes an optimizing C and C++ compiler, assembler, linker, debugger, simulator and binary utilities. All these tools can be driven by the customizable Eclipse
IDE
. The debugger can connect to the target CPU either via JTAG or a serial interface. Complete C and C++ libraries are supplied. The toolchain is available for both Windows and Linux hosts.
and Forward Error Correction
modules such as Fast Fourier Transform
, Viterbi Decoder
and Reed Solomon Decoder. These IP cores can be used standalone or integrated into a SoC subsystem with the eSi-RISC processor.
Semiconductor intellectual property core
In electronic design a semiconductor intellectual property core, IP core, or IP block is a reusable unit of logic, cell, or chip layout design that is the intellectual property of one party. IP cores may be licensed to another party or can be owned and used by a single party alone...
company based in Wokingham
Wokingham
Wokingham is a market town and civil parish in Berkshire in South East England about west of central London. It is about east-southeast of Reading and west of Bracknell. It spans an area of and, according to the 2001 census, has a population of 30,403...
, UK. It is known for its eSi-RISC configurable microprocessor
Microprocessor
A microprocessor incorporates the functions of a computer's central processing unit on a single integrated circuit, or at most a few integrated circuits. It is a multipurpose, programmable device that accepts digital data as input, processes it according to instructions stored in its memory, and...
cores for System-on-a-chip
System-on-a-chip
A system on a chip or system on chip is an integrated circuit that integrates all components of a computer or other electronic system into a single chip. It may contain digital, analog, mixed-signal, and often radio-frequency functions—all on a single chip substrate...
designs. In addition it is a recognized supplier of communications IP under the eSi-Comms family name.
History
EnSilica was formed in 2001 from a group of semiconductor professionals who had worked in engineering and management positions at a number of global telecommunications companies. Their knowledge of communications ASICs established the company as a leading provider of Design Services to UK high technology industry.The company has grown at its Wokingham site and now includes a regional expert design center in Cambridge. The company regularly features in articles from Electronics Weekly, Cambridge Wireless, Silicon South West and the National Microelectronics Institute.
eSi-RISC
EnSilica develops soft processor IP for use in synthesized chip designs, specifically embedded systems under the family name eSi-RISCESi-RISC
eSi-RISC is a configurable CPU architecture from EnSilica. It is currently available in three different implementations: the eSi-1600, eSi-3200 and eSi-3250. The eSi-1600 features a 16-bit data-path, while the eSi-3200 and eSi-3250 feature 32-bit data-paths...
. EnSilica licenses its configurable processor core technology and provides three standard configurations eSi-1600, eSi-3200 and eSi-3250 as well as custom architectures.
The eSi-1600 16-bit CPU
Central processing unit
The central processing unit is the portion of a computer system that carries out the instructions of a computer program, to perform the basic arithmetical, logical, and input/output operations of the system. The CPU plays a role somewhat analogous to the brain in the computer. The term has been in...
core is a low-cost, low-power processor ideal for integration into ASIC
Application-specific integrated circuit
An application-specific integrated circuit is an integrated circuit customized for a particular use, rather than intended for general-purpose use. For example, a chip designed solely to run a cell phone is an ASIC...
and/or FPGA
Field-programmable gate array
A field-programmable gate array is an integrated circuit designed to be configured by the customer or designer after manufacturing—hence "field-programmable"...
designs. It offers similar performance to more expensive 32-bit CPUs while having a system cost comparable to that of 8-bit CPUs. Significant power savings are possible compared to 8-bit CPUs as applications require far fewer clock cycles to run.
The eSi-3200 32-bit CPU core is an extremely small, low-cost, low-power processor ideal for integration into ASIC and/or FPGA designs with on-chip memories. The eSi-3200 is particularly suited to embedded control applications.
The eSi-3250 32-bit CPU is the top-of-the-range member in the eSi-RISC family of processor cores. It is targeted specifically for applications with high performance and large memory requirements.
For applications where high performance is required, the five-stage pipeline allows high clock frequencies to be achieved. While most instructions effectively execute in a single clock cycle, the deep pipeline allows the C and C++ compiler to schedule independent instructions such that instructions that can take multiple cycles to execute, appear to only take one clock cycle. Static branch prediction is employed to minimize the cost of branch instructions.
The eSi-RISC instruction set includes arithmetic and logical instructions (including barrel-shift, multiply and divide), comparisons, load and stores, branches and calls as well as system level instructions to control interrupts and enter lower power states. There are also a number of optional instructions and addressing modes that can be selected, should a specific application require them.
A number of instructions are reserved to allow the user to utilize user defined logic via a simple interface. This allows for otherwise unobtainable performance to be reached for many software inner loops. Instructions are encoded in either 16 or 32-bits, depending upon the size of the operands and the type of instruction. All of the commonly used instructions can be encoded in 16-bits. This ensures that high code density is achieved, while minimizing memory accesses to help conserve power.
The toolchain for eSi-RISC is based upon the industry standard GNU toolchain
GNU toolchain
The GNU toolchain is a blanket term for a collection of programming tools produced by the GNU Project. These tools form a toolchain used for developing applications and operating systems....
, which includes an optimizing C and C++ compiler, assembler, linker, debugger, simulator and binary utilities. All these tools can be driven by the customizable Eclipse
Eclipse (software)
Eclipse is a multi-language software development environment comprising an integrated development environment and an extensible plug-in system...
IDE
Integrated development environment
An integrated development environment is a software application that provides comprehensive facilities to computer programmers for software development...
. The debugger can connect to the target CPU either via JTAG or a serial interface. Complete C and C++ libraries are supplied. The toolchain is available for both Windows and Linux hosts.
eSi-Comms
EnSilica license a range of communications IP specifically for modern COFDM communication systems. These include critical demodulationDemodulation
Demodulation is the act of extracting the original information-bearing signal from a modulated carrier wave.A demodulator is an electronic circuit that is used to recover the information content from the modulated carrier wave.These terms are traditionally used in connection with radio receivers,...
and Forward Error Correction
Forward error correction
In telecommunication, information theory, and coding theory, forward error correction or channel coding is a technique used for controlling errors in data transmission over unreliable or noisy communication channels....
modules such as Fast Fourier Transform
Fast Fourier transform
A fast Fourier transform is an efficient algorithm to compute the discrete Fourier transform and its inverse. "The FFT has been called the most important numerical algorithm of our lifetime ." There are many distinct FFT algorithms involving a wide range of mathematics, from simple...
, Viterbi Decoder
Viterbi decoder
A Viterbi decoder uses the Viterbi algorithm for decoding a bitstream that has beenencoded using forward error correction based on a convolutional code....
and Reed Solomon Decoder. These IP cores can be used standalone or integrated into a SoC subsystem with the eSi-RISC processor.