Value change dump
Encyclopedia
Value change dump is an ASCII
-based format for dumpfiles generated by EDA
logic simulation
tools. The standard, four-value
VCD format was defined along with the Verilog
hardware description language
by the IEEE Standard 1364-1995 in 1995. An Extended VCD format defined six years later in the IEEE Standard 1364-2001 supports the logging of signal strength and directionality. The simple and yet compact structure of the VCD format has allowed its use to become ubiquitous and to spread into non-Verilog tools such as the VHDL simulator GHDL and various kernel tracers. A limitation of the format is that it is unable to record the values in memories.
belonging to each respective section.
VCD keywords
are marked by a leading $ (but variable identifiers can also start with a $). In general every keyword starts a section which is terminated by an $end keyword.
All VCD tokens are delineated by whitespace. Data in the VCD file is case sensitive.
, a simulator
version number, and a timescale, which maps the time increments listed in the value change section to simulation time units.
Each variable is assigned an arbitrary, compact ASCII identifier for use in the value change section. The identifier is composed of printable ASCII characters from ! to ~ (decimal 33 to 126). Several variables can share an identifier if the simulator determines that they will always have the same value.
The scope type definitions closely follow Verilog concepts, and include the types module, task, function, and fork.
The code above defines 7 signals by using $var:
The id is used later on the value change dump. The value change dump starts after $enddefinitions $end and is based on timestamps. Timestamp is denoted as '#' followed by number. On each timestamp the list of signals that change their value is listed. This is done by the value/id pair:
ASCII
The American Standard Code for Information Interchange is a character-encoding scheme based on the ordering of the English alphabet. ASCII codes represent text in computers, communications equipment, and other devices that use text...
-based format for dumpfiles generated by EDA
Electronic design automation
Electronic design automation is a category of software tools for designing electronic systems such as printed circuit boards and integrated circuits...
logic simulation
Logic simulation
Logic simulation is the use of a computer program to simulate the operation of a digital circuit. Logic simulation is the primary tool used for verifying the logical correctness of a hardware design. In many cases logic simulation is the first activity performed in the process of taking a hardware...
tools. The standard, four-value
Four valued logic
In logic, a four-valued logic is used to model signal values in digital circuits: the four values are Z, X and the boolean values 1 and 0. Z stands for high impedance or open circuit, while X stands for "unknown"...
VCD format was defined along with the Verilog
Verilog
In the semiconductor and electronic design industry, Verilog is a hardware description language used to model electronic systems. Verilog HDL, not to be confused with VHDL , is most commonly used in the design, verification, and implementation of digital logic chips at the register-transfer level...
hardware description language
Hardware description language
In electronics, a hardware description language or HDL is any language from a class of computer languages, specification languages, or modeling languages for formal description and design of electronic circuits, and most-commonly, digital logic...
by the IEEE Standard 1364-1995 in 1995. An Extended VCD format defined six years later in the IEEE Standard 1364-2001 supports the logging of signal strength and directionality. The simple and yet compact structure of the VCD format has allowed its use to become ubiquitous and to spread into non-Verilog tools such as the VHDL simulator GHDL and various kernel tracers. A limitation of the format is that it is unable to record the values in memories.
Structure/Syntax
The VCD file comprises a header section with date, simulator, and timescale information; a variable definition section; and a value change section, in that order. The sections are not explicitly delineated within the file, but are identified by the inclusion of keywordsKeyword (computer programming)
In computer programming, a keyword is a word or identifier that has a particular meaning to the programming language. The meaning of keywords — and, indeed, the meaning of the notion of keyword — differs widely from language to language....
belonging to each respective section.
VCD keywords
Keyword (computer programming)
In computer programming, a keyword is a word or identifier that has a particular meaning to the programming language. The meaning of keywords — and, indeed, the meaning of the notion of keyword — differs widely from language to language....
are marked by a leading $ (but variable identifiers can also start with a $). In general every keyword starts a section which is terminated by an $end keyword.
All VCD tokens are delineated by whitespace. Data in the VCD file is case sensitive.
Header section
The header section of the VCD file includes a timestampTimestamp
A timestamp is a sequence of characters, denoting the date or time at which a certain event occurred. A timestamp is the time at which an event is recorded by a computer, not the time of the event itself...
, a simulator
Computer simulation
A computer simulation, a computer model, or a computational model is a computer program, or network of computers, that attempts to simulate an abstract model of a particular system...
version number, and a timescale, which maps the time increments listed in the value change section to simulation time units.
Variable definition section
The variable definition section of the VCD file contains scope information as well as lists of signals instantiated in a given scope.Each variable is assigned an arbitrary, compact ASCII identifier for use in the value change section. The identifier is composed of printable ASCII characters from ! to ~ (decimal 33 to 126). Several variables can share an identifier if the simulator determines that they will always have the same value.
The scope type definitions closely follow Verilog concepts, and include the types module, task, function, and fork.
$dumpvars section
The section beginning with $dumpvars keyword contains initial values of all variables dumped.Value change section
The value change section contains a series of time-ordered value changes for the signals in a given simulation model. For scalar (single bit) signal the format is signal value denoted by 0 or 1 followed immediately by the signal identifier with no space between the value and the signal identifier. For vector (multi-bit) signals the format is signal value denoted by letter 'b' or 'B' followed by the value in binary format followed by space and then the signal identifier. Value for real variables is denoted by letter 'r' or 'R' followed by the data using %.16g printf format followed by space and then the variable identifier.Example VCD File
$date
Date text. For example: November 11, 2009.
$end
$version
VCD generator tool version info text.
$end
$comment
Any comment text.
$end
$timescale 1ps $end
$scope module logic $end
$var wire 8 # data $end
$var wire 1 $ data_valid $end
$var wire 1 % en $end
$var wire 1 & rx_en $end
$var wire 1 ' tx_en $end
$var wire 1 ( empty $end
$var wire 1 ) underrun $end
$upscope $end
$enddefinitions $end
$dumpvars
bxxxxxxxx #
x$
0%
x&
x'
1(
0)
$end
#0
b10000001 #
0$
1%
0&
1'
0(
0)
#2211
0'
#2296
b0 #
1$
#2302
0$
#2303
The code above defines 7 signals by using $var:
$var type bitwidth id name
The id is used later on the value change dump. The value change dump starts after $enddefinitions $end and is based on timestamps. Timestamp is denoted as '#' followed by number. On each timestamp the list of signals that change their value is listed. This is done by the value/id pair:
new_value id
External links
- IEEE Std 1364-2001 – The official standard for Verilog 2001 (not free).
- Compare VCD – A command-line tool to compare VCD files (licensed under the GPL).