SDS Sigma-5
Encyclopedia
The SDS Sigma series was a series of computer
s that was introduced by Scientific Data Systems
in 1966.
The first machines in the series were the 16-bit
Sigma 2 and the 32-bit
Sigma 7; the Sigma 7 was the first 32-bit
computer
released by SDS. At the time the only competition for the Sigma 7 was the IBM 360.
Memory size increments for all SDS/XDS/Xerox computers was stated in kWords, not kBytes. For example, the Sigma 5 base memory was 16K 32-Bit words (64K Bytes). Maximum memory was limited by the length of the instruction address field of 17 bits, or 128K Words (512K Bytes). Although this is a trivial amount of memory in today's technology, Sigma systems performed their tasks exceptionally well, and few were deployed with, or needed, the maximum 128K Word memory size.
The Sigma series was commercially retired in the 1970s when Xerox
, which bought SDS in 1969, left the mainframe computer
business.
Most Sigma systems included two or more blocks of 16 general-purpose registers. Switching blocks was accomplished by a single instruction (LPSD), providing fast context switching since registers did not have to be saved and restored.
All 32-bit Sigma systems except the Sigma 5 and Sigma 8 used a memory map to implement virtual memory
. The following description applies to the Sigma 9, other models had minor differences.
The effective virtual address of a word was 17 bits. Virtual addresses 0 thru 15 were reserved to reference the corresponding general purpose register, and were not mapped. Otherwise, in virtual memory mode the high-order eight bits of this address, called virtual page number, were used as an index to an array of 256 13-bit memory map registers. The thirteen bits from the map register plus the remaining nine bits of the virtual address formed the address used to access real memory.
Access protection was implemented using a separate array of 256 two-bit access control codes, one per virtual page (512 words), indicating a combination of read/write/execute or no access to that page.
Independently, an array of 256 2-bit access control registers for the first 128k words of real memory functioned as a "lock-and-key" system in conjunction with two bits in the program status doubleword. The system allowed pages to be marked "unlocked", or the key to be a "master key". Otherwise the key in the PSD had to match the lock in the access register in order to reference the memory page.
called an IOP (Input-output processor). An IOP provided an 8-bit data path to and from memory. Systems supported up to 8 IOPs, each of which could attach up to 32 device controllers.
An IOP could be either a selector I/O processor (SIOP) or a multiplexer I/O processor (MIOP). The SIOP provided a data rate up to 1.5 megabytes per second (MBPS), but allowed only one device to be active at a time. The MIOP, intended to support slow speed peripherals allowed up to 32 devices to be active at any time, but provided only a .3 MBPS aggregate data rate.
The primary mass storage device, known as a RAD (Random Access Disk), contained 512 fixed heads and a large (approx 600 mm dia) vertically mounted disk spinning at relatively low speeds. Because of the fixed head arrangement access was quite fast. Capacities ranged from 1.6 to 6.0 megabytes and was used for temporary storage. Large capacity multi platter disks were employed for permanent storage.
was donated to the Computer History Museum
in 2002. The system consisted of five full-size cabinets with a monitor, control panel and a printer. It is possibly the last surviving Sigma 5 that is still operational.
The Sigma 5 sold for US$300,000 with 16 kilowords of random-access magnetic-core memory, with an optional memory upgrade to 32 kW for an additional $50,000. The hard disk drive had a capacity of 3 megabytes
.
The Sigma 5 was supported by the Basic Control Monitor (BCM) and the Batch Processing Monitor (BPM). The Sigma 8 could run the Real-time Batch Monitor (RBM) as well as BPM/BTM.
The remaining models initially ran the Batch Processing Monitor (BPM), later augmented with a timesharing option (BTM); the combined system was usually referred to as BPM/BTM. The Universal Time-Sharing System
(UTS) became available in 1971, supporting much enhanced time-sharing facilities. A compatible upgrade (or renaming) of UTS, Control Program V (CP-V) became available starting in 1973 and added real-time, remote batch, and transaction processing. A dedicated real-time OS, Control Program for Real-Time (CP-R) was also available for Sigma 9 systems. The Xerox Operating System
(XOS), intended as an IBM DOS
replacement, also ran on Sigma 6/7/9 systems, but never gained real popularity.
Computer
A computer is a programmable machine designed to sequentially and automatically carry out a sequence of arithmetic or logical operations. The particular sequence of operations can be changed readily, allowing the computer to solve more than one kind of problem...
s that was introduced by Scientific Data Systems
Scientific Data Systems
Scientific Data Systems, or SDS, was an American computer company founded in September 1961 by Max Palevsky, a veteran of Packard Bell and Bendix, along with eleven other computer scientists. SDS was an early adopter of integrated circuits in computer design and the first to employ silicon...
in 1966.
The first machines in the series were the 16-bit
16-bit
-16-bit architecture:The HP BPC, introduced in 1975, was the world's first 16-bit microprocessor. Prominent 16-bit processors include the PDP-11, Intel 8086, Intel 80286 and the WDC 65C816. The Intel 8088 was program-compatible with the Intel 8086, and was 16-bit in that its registers were 16...
Sigma 2 and the 32-bit
32-bit
The range of integer values that can be stored in 32 bits is 0 through 4,294,967,295. Hence, a processor with 32-bit memory addresses can directly access 4 GB of byte-addressable memory....
Sigma 7; the Sigma 7 was the first 32-bit
32-bit
The range of integer values that can be stored in 32 bits is 0 through 4,294,967,295. Hence, a processor with 32-bit memory addresses can directly access 4 GB of byte-addressable memory....
computer
Computer
A computer is a programmable machine designed to sequentially and automatically carry out a sequence of arithmetic or logical operations. The particular sequence of operations can be changed readily, allowing the computer to solve more than one kind of problem...
released by SDS. At the time the only competition for the Sigma 7 was the IBM 360.
Memory size increments for all SDS/XDS/Xerox computers was stated in kWords, not kBytes. For example, the Sigma 5 base memory was 16K 32-Bit words (64K Bytes). Maximum memory was limited by the length of the instruction address field of 17 bits, or 128K Words (512K Bytes). Although this is a trivial amount of memory in today's technology, Sigma systems performed their tasks exceptionally well, and few were deployed with, or needed, the maximum 128K Word memory size.
The Sigma series was commercially retired in the 1970s when Xerox
Xerox
Xerox Corporation is an American multinational document management corporation that produced and sells a range of color and black-and-white printers, multifunction systems, photo copiers, digital production printing presses, and related consulting services and supplies...
, which bought SDS in 1969, left the mainframe computer
Mainframe computer
Mainframes are powerful computers used primarily by corporate and governmental organizations for critical applications, bulk data processing such as census, industry and consumer statistics, enterprise resource planning, and financial transaction processing.The term originally referred to the...
business.
32-bit systems
| Model | Date | Floating point | Decimal | Byte string | Memory map | Max memory (kwords) |
|---|---|---|---|---|---|---|
| Sigma 7 | 1966 | optional | optional | standard | optional | 128 |
| Sigma 5 | 1967 | optional | N/A | N/A | N/A | 128 |
| Sigma 6 | 1970 | optional | standard | standard | standard | 128 |
| Sigma 9 | 1971 | standard | standard | standard | standard | 512 |
| Sigma 8 | 1972 | standard | N/A | N/A | N/A | 128 |
| Sigma 9 model 2 | ? | standard | standard | standard | standard | 256 |
| Sigma 9 model 3 | 1973 | standard | N/A | N/A | standard | 512 |
16-bit systems
| Model | Date | Max memory (kwords) |
|---|---|---|
| Sigma 2 | 1966 | 64 |
| Sigma 3 | 1964 | 64 |
CPU
Sigma systems provided a range of performance of about double from the slowest, Sigma 5, to the fastest, the Sigma 9 model 3. For example, 32-bit fixed point multiply times ranged from 3.8 to 7.2 microseconds; 64-bit floating point divide ranged from 17.4 to 30.5 μsec.Most Sigma systems included two or more blocks of 16 general-purpose registers. Switching blocks was accomplished by a single instruction (LPSD), providing fast context switching since registers did not have to be saved and restored.
Memory
Memory in the Sigma systems could be addressed as individual bytes, halfwords, words, or doublewords.All 32-bit Sigma systems except the Sigma 5 and Sigma 8 used a memory map to implement virtual memory
Virtual memory
In computing, virtual memory is a memory management technique developed for multitasking kernels. This technique virtualizes a computer architecture's various forms of computer data storage , allowing a program to be designed as though there is only one kind of memory, "virtual" memory, which...
. The following description applies to the Sigma 9, other models had minor differences.
The effective virtual address of a word was 17 bits. Virtual addresses 0 thru 15 were reserved to reference the corresponding general purpose register, and were not mapped. Otherwise, in virtual memory mode the high-order eight bits of this address, called virtual page number, were used as an index to an array of 256 13-bit memory map registers. The thirteen bits from the map register plus the remaining nine bits of the virtual address formed the address used to access real memory.
Access protection was implemented using a separate array of 256 two-bit access control codes, one per virtual page (512 words), indicating a combination of read/write/execute or no access to that page.
Independently, an array of 256 2-bit access control registers for the first 128k words of real memory functioned as a "lock-and-key" system in conjunction with two bits in the program status doubleword. The system allowed pages to be marked "unlocked", or the key to be a "master key". Otherwise the key in the PSD had to match the lock in the access register in order to reference the memory page.
Peripherals
Input/output was accomplished using a control unitControl unit
A control unit in general is a central part of the machinery that controls its operation, provided that a piece of machinery is complex and organized enough to contain any such unit. One domain in which the term is specifically used is the area of computer design...
called an IOP (Input-output processor). An IOP provided an 8-bit data path to and from memory. Systems supported up to 8 IOPs, each of which could attach up to 32 device controllers.
An IOP could be either a selector I/O processor (SIOP) or a multiplexer I/O processor (MIOP). The SIOP provided a data rate up to 1.5 megabytes per second (MBPS), but allowed only one device to be active at a time. The MIOP, intended to support slow speed peripherals allowed up to 32 devices to be active at any time, but provided only a .3 MBPS aggregate data rate.
The primary mass storage device, known as a RAD (Random Access Disk), contained 512 fixed heads and a large (approx 600 mm dia) vertically mounted disk spinning at relatively low speeds. Because of the fixed head arrangement access was quite fast. Capacities ranged from 1.6 to 6.0 megabytes and was used for temporary storage. Large capacity multi platter disks were employed for permanent storage.
| Device | Device type | Capacity (MiB) | Avg seek time (msec) | Avg rotational delay (msec) | Avg transfer rate(KiB/sec) |
|---|---|---|---|---|---|
| 3214 | RAD | 2.75 | N/A | 8.5 | 647 |
| 7202 | RAD | .7 | N/A | 17 | 166 |
| 7203 | RAD | 1.4 | N/A | 17 | 166 |
| 7204 | RAD | 2.8 | N/A | 17 | 166 |
| 7232 | RAD | 6.0 | N/A | 17 | 355 |
| 3231 | Cartridge disk | 2.4 removable | 38 | 12.5 | 246 |
| 3232 | Cartridge disk | 4.9 removable | 38 | 12.5 | 246 |
| 3233 | Cartridge disk | 4.9 fixed 4.9 removable |
38 | 12.5 | 246 |
| 3242 | Cartridge disk | 5.7 removable | 38 | 12.5 | 286 |
| 3243 | Cartridge disk | 5.7 fixed 5.7 removable |
38 | 12.5 | 286 |
| 7251 | Cartridge disk | 2.3 removable | 38 | 12.5 | 225 |
| 7252 | Cartridge disk | 2.3 fixed 2.3 removable |
38 | 12.5 | 225 |
| 3277 | Removable disk | 95 | 30 | 8.3 | 787 |
| 7271 | Removable disk | 46.8 | 35 | 12.5 | 245 |
Carnegie Mellon Sigma 5 (shown)
The Sigma 5 computer owned by Carnegie Mellon UniversityCarnegie Mellon University
Carnegie Mellon University is a private research university in Pittsburgh, Pennsylvania, United States....
was donated to the Computer History Museum
Computer History Museum
The Computer History Museum is a museum established in 1996 in Mountain View, California, USA. The Museum is dedicated to preserving and presenting the stories and artifacts of the information age, and exploring the computing revolution and its impact on our lives.-History:The museum's origins...
in 2002. The system consisted of five full-size cabinets with a monitor, control panel and a printer. It is possibly the last surviving Sigma 5 that is still operational.
The Sigma 5 sold for US$300,000 with 16 kilowords of random-access magnetic-core memory, with an optional memory upgrade to 32 kW for an additional $50,000. The hard disk drive had a capacity of 3 megabytes
Byte
The byte is a unit of digital information in computing and telecommunications that most commonly consists of eight bits. Historically, a byte was the number of bits used to encode a single character of text in a computer and for this reason it is the basic addressable element in many computer...
.
Operating systems
Sigma 5 and 8 systems lacked the memory map feature,The Sigma 5 was supported by the Basic Control Monitor (BCM) and the Batch Processing Monitor (BPM). The Sigma 8 could run the Real-time Batch Monitor (RBM) as well as BPM/BTM.
The remaining models initially ran the Batch Processing Monitor (BPM), later augmented with a timesharing option (BTM); the combined system was usually referred to as BPM/BTM. The Universal Time-Sharing System
Universal Time-Sharing System
-UTS:The Universal Time-Sharing System was an operating system for the XDS Sigma line of computers, succeeding BTM/BPM. UTS was announced in 1966, but because of delays did not actually ship until 1971...
(UTS) became available in 1971, supporting much enhanced time-sharing facilities. A compatible upgrade (or renaming) of UTS, Control Program V (CP-V) became available starting in 1973 and added real-time, remote batch, and transaction processing. A dedicated real-time OS, Control Program for Real-Time (CP-R) was also available for Sigma 9 systems. The Xerox Operating System
Xerox Operating System
XOS was an operating system for the XDS Sigma line of computers "optimized for direct replacement of IBM DOS/360 installations" and to provide real-time and timesharing support ....
(XOS), intended as an IBM DOS
DOS/360
Disk Operating System/360, also DOS/360, or simply DOS, was an operating system for IBM mainframes. It was announced by IBM on the last day of 1964, and it was first delivered in June 1966....
replacement, also ran on Sigma 6/7/9 systems, but never gained real popularity.