Pluribus
Encyclopedia
The Pluribus multiprocessor
Multiprocessor
Computer system having two or more processing units each sharing main memory and peripherals, in order to simultaneously process programs.Sometimes the term Multiprocessor is confused with the term Multiprocessing....

 was an early multi-processor computer designed by BBN
BBN Technologies
BBN Technologies is a high-technology company which provides research and development services. BBN is based next to Fresh Pond in Cambridge, Massachusetts, USA...

 for use as a packet switch in the ARPANET
ARPANET
The Advanced Research Projects Agency Network , was the world's first operational packet switching network and the core network of a set that came to compose the global Internet...

. Its design later influenced the BBN Butterfly computer.

The Pluribus had its beginnings in 1972 when the need for a second-generation interface message processor (IMP) became apparent. At that time, the BBN had already installed IMPs at more than thirty-five ARPANET sites. These IMPs were Honeywell 316
Honeywell 316
The Honeywell 316 was a popular 16-bit minicomputer built by Honeywell starting in 1969. It is part of the Series 16 which includes the Models 116, 316, 416, 516 and 716. They were commonly used for data acquisition and control, remote message concentration, clinical laboratory systems and...

 and 516 minicomputers. The network was growing rapidly in several dimensions: number of nodes, hosts, and terminals; volume of traffic; and geographic coverage (including plans, now realized, for satellite extensions to Europe
NORSAR
NORSAR or Norwegian Seismic Array was established in 1968 as part of the Norwegian-US agreement for the detection of earthquakes and nuclear explosions. NORSAR was the first non-US site included in ARPANET in 1973...

 and Hawaii).

A goal was established to design a modular machine which, at its lower end, would be smaller and less expensive than the 316's and 516's while being expandable in capacity to provide ten times the bandwidth of, and capable of servicing five times as many input-output (I/O) devices as, the 516. Related goals included greater memory addressing capability and increased reliability.

The designers decided on a multiprocessor approach because of its promising potential for modularity, for cost per performance advantages, for reliability, and because the IMP packet switch algorithms were clearly suitable for parallel processing by independent processors.

Pluribus Hardware

A Pluribus consisted of two or more standard 19" electronic equipment racks, each divided into four bays. Each bay contained a backplane bus and an independent power supply. A bay might contain a processor bus, a shared memory bus, or an I/O bus. Custom-built bus couplers connected the bays to one another so that the processors could reach the shared memory and the I/O devices.

A 6-processor Pluribus was used as a network switch to interconnect BBN's five Tenex
TOPS-20
The TOPS-20 operating system by Digital Equipment Corporation was the second proprietary OS for the PDP-10 mainframe computer. TOPS-20 began in 1969 as the TENEX operating system of Bolt, Beranek and Newman...

/"Twenex" timesharing systems along with 378 terminals on direct serial and dial-in modem lines. The Pluribus used the Lockheed SUE as its processor. The SUE was similar to DEC's PDP-11
PDP-11
The PDP-11 was a series of 16-bit minicomputers sold by Digital Equipment Corporation from 1970 into the 1990s, one of a succession of products in the PDP series. The PDP-11 replaced the PDP-8 in many real-time applications, although both product lines lived in parallel for more than 10 years...

.

Pluribus Software

The Pluribus software implemented MIMD
MIMD
In computing, MIMD is a technique employed to achieve parallelism. Machines using MIMD have a number of processors that function asynchronously and independently. At any time, different processors may be executing different instructions on different pieces of data...

 symmetric multiprocessing. Software processes were implemented using non-preemptive multiprogramming. Process scheduling used a hardware device, called the pseudo-interrupt device or PID, that was accessible to both programs and to I/O devices. Each processor ran its own copy of the process scheduler, which would read an integer value from the PID. The value was used to select the process to run. If a program or device needed to signal another process to run, it would write that process' number into the PID. The PID would emit the highest priority process that anyone had requested, and served them out to all processors.

An important aspect of the Pluribus software was the "STAGE" system, which detected system errors and took steps to recover from them. The processor clocks had interrupt handlers which implemented watchdog timers on all processors. If a processor stopped running, another processor would detect it and initiate a recovery. The recovery process would unlock any locks
Lock (computer science)
In computer science, a lock is a synchronization mechanism for enforcing limits on access to a resource in an environment where there are many threads of execution. Locks are one way of enforcing concurrency control policies.-Types:...

placed on shared resources, release allocated storage, and restart all processing on all processors. This was acceptable on an ARPANET routing node, since any lost packets would eventually be retransmitted.
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