PBIST
Encyclopedia
Programmable Built-In Self-Test (PBIST) is a memory DFT feature that incorporates all the required test systems into the chip itself. The test systems implemented on-chip are as follows:
PBIST was originally adopted by large memory chips that have high pin counts and operate at high frequencies, thereby exceeding the capability of production testers.
The purpose of PBIST is to avoid developing and buying more sophisticated and very expensive testers. The interface between PBIST, which is internal to the processor, and the external tester environment is through
the standard JTAG
TAP controller pins. Algorithms and controls are fed into the chip through the TAP controller’s Test Data Input (TDI) pin. The final result of the PBIST test is read out through the Test Data Output (TDO) pin.
PBIST supports the entire algorithmic memory testing requirements imposed by the production testing methodology. In order to support all of the required test algorithms, PBIST must have the capability to store the required programs locally in the device. It must also be able to perform different address generation schemes, different test data pattern generation, looping schemes, and data comparisons.
Part of the Built-in self-test
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- algorithmic address generator
- algorithmic data generator
- program storage unit
- loop control mechanisms
PBIST was originally adopted by large memory chips that have high pin counts and operate at high frequencies, thereby exceeding the capability of production testers.
The purpose of PBIST is to avoid developing and buying more sophisticated and very expensive testers. The interface between PBIST, which is internal to the processor, and the external tester environment is through
the standard JTAG
JTAG
Joint Test Action Group is the common name for what was later standardized as the IEEE 1149.1 Standard Test Access Port and Boundary-Scan Architecture. It was initially devised for testing printed circuit boards using boundary scan and is still widely used for this application.Today JTAG is also...
TAP controller pins. Algorithms and controls are fed into the chip through the TAP controller’s Test Data Input (TDI) pin. The final result of the PBIST test is read out through the Test Data Output (TDO) pin.
PBIST supports the entire algorithmic memory testing requirements imposed by the production testing methodology. In order to support all of the required test algorithms, PBIST must have the capability to store the required programs locally in the device. It must also be able to perform different address generation schemes, different test data pattern generation, looping schemes, and data comparisons.
Part of the Built-in self-test
Built-in self-test
A built-in self-test or built-in test is a mechanism that permits a machine to test itself. Engineers design BISTs to meet requirements such as:*high reliability*lower repair cycle timesor constraints such as:...
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