Memory bus
Encyclopedia
The memory bus is the computer bus which connects the main memory to the memory controller
in computer systems. Originally, general-purpose buses like VMEbus
and the S-100 bus
were used, but to reduce latency
, modern memory buses are designed to connect directly to DRAM
chips, and thus are designed by chip standards bodies such as JEDEC
. Examples are the various generations of SDRAM
, and serial point-to-point buses like SLDRAM and RDRAM
. An exception is the Fully Buffered DIMM
which, despite being carefully designed to minimize the effect, has been criticized for its higher latency.
Memory controller
The memory controller is a digital circuit which manages the flow of data going to and from the main memory. It can be a separate chip or integrated into another chip, such as on the die of a microprocessor...
in computer systems. Originally, general-purpose buses like VMEbus
VMEbus
VMEbus is a computer bus standard, originally developed for the Motorola 68000 line of CPUs, but later widely used for many applications and standardized by the IEC as ANSI/IEEE 1014-1987. It is physically based on Eurocard sizes, mechanicals and connectors , but uses its own signalling system,...
and the S-100 bus
S-100 bus
The S-100 bus or Altair bus, IEEE696-1983 , was an early computer bus designed in 1974 as a part of the Altair 8800, generally considered today to be the first personal computer...
were used, but to reduce latency
Latency (engineering)
Latency is a measure of time delay experienced in a system, the precise definition of which depends on the system and the time being measured. Latencies may have different meaning in different contexts.-Packet-switched networks:...
, modern memory buses are designed to connect directly to DRAM
Dram
Dram or DRAM may refer to:As a unit of measure:* Dram , an imperial unit of mass and volume* Armenian dram, a monetary unit* Dirham, a unit of currency in several Arab nationsOther uses:...
chips, and thus are designed by chip standards bodies such as JEDEC
JEDEC
The JEDEC Solid State Technology Association, formerly known as the Joint Electron Devices Engineering Council , is an independent semiconductor engineering trade organization and standardization body...
. Examples are the various generations of SDRAM
SDRAM
Synchronous dynamic random access memory is dynamic random access memory that is synchronized with the system bus. Classic DRAM has an asynchronous interface, which means that it responds as quickly as possible to changes in control inputs...
, and serial point-to-point buses like SLDRAM and RDRAM
RDRAM
Direct Rambus DRAM or DRDRAM is a type of synchronous dynamic RAM. RDRAM was developed by Rambus inc., in the mid-1990s as a replacement for then-prevalent DIMM SDRAM memory architecture....
. An exception is the Fully Buffered DIMM
Fully Buffered DIMM
Fully Buffered DIMM is a memory technology which can be used to increase reliability and density of memory systems. Conventionally, data lines from the memory controller have to be connected to data lines in every DRAM module. As memory width, as well as access speed, increases, the signal...
which, despite being carefully designed to minimize the effect, has been criticized for its higher latency.