Intel APIC Architecture
Encyclopedia
The Intel APIC Architecture is a system of advanced programmable interrupt controller
s (APICs) designed by Intel for use in symmetric multiprocessor
(SMP) computer systems. It was originally implemented by the Intel 82093AA and 82489DX, and is found in most x86 SMP motherboard
s. It is one of several attempts to solve interrupt routing efficiency issues in multiprocessor computer systems.
In systems containing an 8259
PIC, the 8259 may be connected to the LAPIC in the system's bootstrap processor (BSP), or to one of the system's I/O APICs, or both. Logically, however, the 8259 is only connected once at any given time.
s (IPIs) between LAPICs. LAPICs may support up to 224 usable interrupt
vectors from an I/O APIC. Vectors numbers 0 to 31, out of 0 to 255, are reserved for exception handling by x86 processors.
es may not set up interrupt routing properly, or provide incorrect ACPI
tables and Intel Multiprocessor Specification tables. Finally, the APIC can also be a cause of system failure when the operating system does not support it properly. On older operating systems, people often had to disable the I/O and local APICs. While this is not possible anymore due to the prevalence of simultaneous multi-threading and multi-core systems, the bugs in the firmware and the operating systems are now a rare occurrence.
Advanced Programmable Interrupt Controller
In computing, an Advanced Programmable Interrupt Controller is a more complex Programmable Interrupt Controller than Intel's original types such as the 8259A...
s (APICs) designed by Intel for use in symmetric multiprocessor
Symmetric multiprocessing
In computing, symmetric multiprocessing involves a multiprocessor computer hardware architecture where two or more identical processors are connected to a single shared main memory and are controlled by a single OS instance. Most common multiprocessor systems today use an SMP architecture...
(SMP) computer systems. It was originally implemented by the Intel 82093AA and 82489DX, and is found in most x86 SMP motherboard
Motherboard
In personal computers, a motherboard is the central printed circuit board in many modern computers and holds many of the crucial components of the system, providing connectors for other peripherals. The motherboard is sometimes alternatively known as the mainboard, system board, or, on Apple...
s. It is one of several attempts to solve interrupt routing efficiency issues in multiprocessor computer systems.
Overview
There are two components in the Intel APIC system, the local APIC (LAPIC) and the I/O APIC. There is one LAPIC in each CPU in the system. There is typically one I/O APIC for each peripheral bus in the system. In original system designs, LAPICs and I/O APICs were connected by a dedicated APIC bus. Newer systems use the system bus for communication between all APIC components.In systems containing an 8259
Intel 8259
The Intel 8259 is a Programmable Interrupt Controller designed for the Intel 8085 and Intel 8086 microprocessors. The initial part was 8259, a later A suffix version was upward compatible and usable with the 8086 or 8088 processor...
PIC, the 8259 may be connected to the LAPIC in the system's bootstrap processor (BSP), or to one of the system's I/O APICs, or both. Logically, however, the 8259 is only connected once at any given time.
Local APICs
LAPICs manage all external interrupts for some specific processor in an SMP system. In addition, it is able to accept and generate inter-processor interruptInter-Processor Interrupt
An inter-processor interrupt is a special type of interrupt by which one processor may interrupt another processor in a multiprocessor system. IPIs are typically used to implement a cache coherency synchronization point.- Windows :...
s (IPIs) between LAPICs. LAPICs may support up to 224 usable interrupt
Interrupt
In computing, an interrupt is an asynchronous signal indicating the need for attention or a synchronous event in software indicating the need for a change in execution....
vectors from an I/O APIC. Vectors numbers 0 to 31, out of 0 to 255, are reserved for exception handling by x86 processors.
I/O APICs
I/O APICs contain a redirection table, which is used to route the interrupts it receives from peripheral buses to one or more local APICs.Problems
There are a number of known bugs in implementations of APIC systems, especially with concern to how the 8254 is connected. Defective BIOSBIOS
In IBM PC compatible computers, the basic input/output system , also known as the System BIOS or ROM BIOS , is a de facto standard defining a firmware interface....
es may not set up interrupt routing properly, or provide incorrect ACPI
Advanced Configuration and Power Interface
In computing, the Advanced Configuration and Power Interface specification provides an open standard for device configuration and power management by the operating system....
tables and Intel Multiprocessor Specification tables. Finally, the APIC can also be a cause of system failure when the operating system does not support it properly. On older operating systems, people often had to disable the I/O and local APICs. While this is not possible anymore due to the prevalence of simultaneous multi-threading and multi-core systems, the bugs in the firmware and the operating systems are now a rare occurrence.
More information
More information on the Intel APIC Architecture can be found in the Intel 64 and IA-32 Intel Architecture Software Developer’s Manual, Volume 3A: System Programming Guide, Part 1, Chapter 10, freely available on the Intel website.See also
- Intel 8259Intel 8259The Intel 8259 is a Programmable Interrupt Controller designed for the Intel 8085 and Intel 8086 microprocessors. The initial part was 8259, a later A suffix version was upward compatible and usable with the 8086 or 8088 processor...
- Advanced Programmable Interrupt ControllerAdvanced Programmable Interrupt ControllerIn computing, an Advanced Programmable Interrupt Controller is a more complex Programmable Interrupt Controller than Intel's original types such as the 8259A...
(APIC) - Programmable Interrupt ControllerProgrammable Interrupt ControllerIn computing, a programmable interrupt controller is a device that is used to combine several sources of interrupt onto one or more CPU lines, while allowing priority levels to be assigned to its interrupt outputs. When the device has multiple interrupt outputs to assert, it will assert them in...
(PIC) - Inter-processor interruptInter-Processor InterruptAn inter-processor interrupt is a special type of interrupt by which one processor may interrupt another processor in a multiprocessor system. IPIs are typically used to implement a cache coherency synchronization point.- Windows :...
(IPI) - InterruptInterruptIn computing, an interrupt is an asynchronous signal indicating the need for attention or a synchronous event in software indicating the need for a change in execution....
- Interrupt handlerInterrupt handlerAn interrupt handler, also known as an interrupt service routine , is a callback subroutine in microcontroller firmware, operating system or device driver whose execution is triggered by the reception of an interrupt...
- Message Signaled InterruptsMessage Signaled InterruptsMessage Signaled Interrupts, in PCI 2.2and later in PCI Express, are an alternative way of generating an interrupt. Traditionally, a device has an interrupt pin which it asserts when it wants to interrupt the host CPU. While PCI Express does not have separate interrupt pins, it has special...
(MSI) - Non-maskable interruptNon-Maskable interruptA non-maskable interrupt is a computer processor interrupt that cannot be ignored by standard interrupt masking techniques in the system. It is typically used to signal attention for non-recoverable hardware errors...
(NMI) - x2APICX2APICThe x2APIC architecture provides backward compatibility to the Intel APIC Architecture/xAPIC architecture and forward extendability for future Intel platform innovations.-More information:...
External links
- Intel MultiProcessor Specification Version 1.4 May 1997 (PDF)
- Intel 82093AA I/O Advanced Programmable Interrupt Controller (I/O APIC) Datasheet
- Key Benefits of the I/O APIC Microsoft's explanation of I/O APIC
- Importance of Implementing APIC-Based Interrupt Subsystems on Uniprocessor PCs
- Advanced Programmable Interrupt Controller A short introduction of what APIC is and its benefits