FASTBUS
Encyclopedia
FASTBUS is a computer bus
Computer bus
In computer architecture, a bus is a subsystem that transfers data between components inside a computer, or between computers.Early computer buses were literally parallel electrical wires with multiple connections, but the term is now used for any physical arrangement that provides the same...

 standard, originally intended to replace CAMAC in high-speed, large-scale data acquisition.

Description

A FASTBUS system consists of one or more segments. Each segment may be a "crate segment" or a "cable segment". Segments are connected together using a segment interconnect (SI). A crate segment typically consists of a backplane with slots to hold up to 25 modules, mounted in a 19-inch rack
19-inch rack
A 19-inch rack is a standardized frame or enclosure for mounting multiple equipment modules. Each module has a front panel that is wide, including edges or ears that protrude on each side which allow the module to be fastened to the rack frame with screws.-Overview and history:Equipment designed...

. Each module is typically a printed circuit
board with a front panel, similar to a Blade PC
Blade PC
A blade PC is a form of client or personal computer . In conjunction with a client access device on a user's desk, the supporting blade PC is typically housed in a rack enclosure, usually in a datacenter or specialised environment...

. Modules are physically about 14 inches by 15 inches, and may occupy one or more adjacent slots.

Small systems may consist of only one crate segment, or a small number of independent crate segments connected directly to a central computer rather than using segment interconnects.

FASTBUS uses the Emitter coupled logic
Emitter coupled logic
In electronics, emitter-coupled logic , is a logic family that achieves high speed by using an overdriven BJT differential amplifier with single-ended input, whose emitter current is limited to avoid the slow saturation region of transistor operation....

 (ECL) electrical standard, which allows higher speed than TTL and generates less switching noise. Segments implement a 32-bit multiplexed address/data bus, which allows a larger address space than CAMAC. A module may be a Master or slave. There may be multiple masters in a segment; masters arbitrate for control of the bus and then perform data transfers to or from slaves. This allows for very fast read-out of an entire segment by doing a chained block read from a master with a general-purpose CPU. Each IO card will then assume mastership, send its data and then hand off mastership to the next card in a sequence, all without the overhead of the supervising board with the general-purpose CPU.

Cable Segments are implemented using 32-bit-wide parallel twisted-pair cables and a differential signalling scheme. The electrical standard allows regular ECL receiver chips but requires custom
transmitter circuits which allow lines to be safely driven both high and low at the same time - this feature is required by the arbitration logic.

Full-size crates can hold about 25 modules. Each module may dissipate up to 70 W, giving a total crate heat load of 1750 W. Modules require a −5.2 V supply for the ECL interface, usually a separate −2 V supply for ECL termination, and often a +5V supply for TTL or CMOS logic. Crates typically have dedicated 200 A or 300 A switched-mode power supplies, providing current to the modules through multiple pins on the backplane connector. A large installation typically has multiple racks, each with three crates. Cooling and air handling are a significant issue, as is the safe design of high-current power distribution.

History

FASTBUS was conceived as a replacement for CAMAC in data acquisition systems. Limitations of CAMAC were a slow bus speed, limited bus width, single bus controller and unwieldy inter-crate communications (the CAMAC Branch Highway). FASTBUS sought improvement in all these areas by using a faster bus logic (ECL), an asynchronous bus protocol, and a sophisticated multi-segment design. At the time, it seemed obvious that the way to get higher speed was a wide parallel bus, since the logic for each bit was already as fast as the electronics allowed. Later developments have moved to high-speed serial protocols such as SATA, leaving designs such as the FASTBUS serial segment as a technological dead end.

The IEEE standard was originally approved in May 1984.

FASTBUS was used in many high-energy physics experiments during the 1980s, principally at laboratories involved in the development of the standard.
These include
CERN
CERN
The European Organization for Nuclear Research , known as CERN , is an international organization whose purpose is to operate the world's largest particle physics laboratory, which is situated in the northwest suburbs of Geneva on the Franco–Swiss border...

, SLAC, Fermilab
Fermilab
Fermi National Accelerator Laboratory , located just outside Batavia, Illinois, near Chicago, is a US Department of Energy national laboratory specializing in high-energy particle physics...

, Brookhaven National Laboratory
Brookhaven National Laboratory
Brookhaven National Laboratory , is a United States national laboratory located in Upton, New York on Long Island, and was formally established in 1947 at the site of Camp Upton, a former U.S. Army base...

 and TRIUMF
TRIUMF
TRIUMF is Canada’s national laboratory for particle and nuclear physics. Its headquarters are located on the south campus of the University of British Columbia in Vancouver, British Columbia. TRIUMF houses the world's largest cyclotron, source of 500 MeV protons, which was named an IEEE Milestone...



FASTBUS has now largely been replaced by VMEbus
VMEbus
VMEbus is a computer bus standard, originally developed for the Motorola 68000 line of CPUs, but later widely used for many applications and standardized by the IEC as ANSI/IEEE 1014-1987. It is physically based on Eurocard sizes, mechanicals and connectors , but uses its own signalling system,...

 in
smaller-scale systems and by custom designs (which have lower per-channel cost) in large systems.

The problems of
manufacturing cable segment transmitter chips reliably, together with the cable-handling issues of the wide parallel bus, contributed to the low usage of cable segments. The system interconnect modules were also complex and expensive, again discouraging cable segment use. These problems, together with the late development of inexpensive protocol chips, hindered the expression of the full potential of FASTBUS multi-segment architecture.

Standards

FASTBUS is described in the IEEE standard 960-1986: "IEEE Standard FASTBUS Modular High-Speed Data Acquisition and Control System"

The system on which the IEEE standard is based (US Department of Energy Report DOE/ER-0189) was developed
by the NIM committee of the US Department of Energy. Representatives of the ESONE committee of European laboratories
and of other laboratories in Europe and Canada also contributed to the standard.

See also

  • VMEbus
    VMEbus
    VMEbus is a computer bus standard, originally developed for the Motorola 68000 line of CPUs, but later widely used for many applications and standardized by the IEC as ANSI/IEEE 1014-1987. It is physically based on Eurocard sizes, mechanicals and connectors , but uses its own signalling system,...

  • Computer Automated Measurement and Control (CAMAC)
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