Bus mastering
Encyclopedia
In computing
, bus mastering is a feature supported by many bus architecture
s that enables a device connected to the bus to initiate transactions. It is also referred to as "first-party DMA", in contrast with "third-party DMA" where a system DMA controller
(also known as peripheral processor, I/O processor, or channel) actually does the transfer.
Some types of buses allow only one device (typically the CPU
, or its proxy) to initiate transactions. Most modern bus architectures, such as PCI
, allow multiple devices to bus master because it significantly improves performance for general purpose operating system
s. Some real-time operating system
s prohibit peripherals from becoming bus masters, because the scheduler can no longer arbitrate for the bus and hence cannot provide deterministic latency.
While bus mastering theoretically allows one peripheral device to directly communicate with another, in practice almost all peripherals master the bus exclusively to perform DMA
to main memory.
If multiple devices are able to master the bus, there needs to be an arbitration scheme to prevent multiple devices attempting to drive the bus simultaneously. A number of different schemes are used for this; for example SCSI
has a fixed priority for each SCSI ID. PCI does not specify the algorithm to use, leaving it up to the implementation to set priorities.
Computing
Computing is usually defined as the activity of using and improving computer hardware and software. It is the computer-specific part of information technology...
, bus mastering is a feature supported by many bus architecture
Computer bus
In computer architecture, a bus is a subsystem that transfers data between components inside a computer, or between computers.Early computer buses were literally parallel electrical wires with multiple connections, but the term is now used for any physical arrangement that provides the same...
s that enables a device connected to the bus to initiate transactions. It is also referred to as "first-party DMA", in contrast with "third-party DMA" where a system DMA controller
Channel I/O
In computer science, channel I/O is a generic term that refers to a high-performance input/output architecture that is implemented in various forms on a number of computer architectures, especially on mainframe computers...
(also known as peripheral processor, I/O processor, or channel) actually does the transfer.
Some types of buses allow only one device (typically the CPU
Central processing unit
The central processing unit is the portion of a computer system that carries out the instructions of a computer program, to perform the basic arithmetical, logical, and input/output operations of the system. The CPU plays a role somewhat analogous to the brain in the computer. The term has been in...
, or its proxy) to initiate transactions. Most modern bus architectures, such as PCI
Peripheral Component Interconnect
Conventional PCI is a computer bus for attaching hardware devices in a computer...
, allow multiple devices to bus master because it significantly improves performance for general purpose operating system
Operating system
An operating system is a set of programs that manage computer hardware resources and provide common services for application software. The operating system is the most important type of system software in a computer system...
s. Some real-time operating system
Real-time operating system
A real-time operating system is an operating system intended to serve real-time application requests.A key characteristic of a RTOS is the level of its consistency concerning the amount of time it takes to accept and complete an application's task; the variability is jitter...
s prohibit peripherals from becoming bus masters, because the scheduler can no longer arbitrate for the bus and hence cannot provide deterministic latency.
While bus mastering theoretically allows one peripheral device to directly communicate with another, in practice almost all peripherals master the bus exclusively to perform DMA
Direct memory access
Direct memory access is a feature of modern computers that allows certain hardware subsystems within the computer to access system memory independently of the central processing unit ....
to main memory.
If multiple devices are able to master the bus, there needs to be an arbitration scheme to prevent multiple devices attempting to drive the bus simultaneously. A number of different schemes are used for this; for example SCSI
SCSI
Small Computer System Interface is a set of standards for physically connecting and transferring data between computers and peripheral devices. The SCSI standards define commands, protocols, and electrical and optical interfaces. SCSI is most commonly used for hard disks and tape drives, but it...
has a fixed priority for each SCSI ID. PCI does not specify the algorithm to use, leaving it up to the implementation to set priorities.